DESIGNING WITH THE TI380C60 CMOS TOKEN-RING PHYSICAL LAYER DEVICE

The TI380C60 CMOS token-ring physical layer device is compatible with the electrical interface section of the IEEE Standard 8802.5:1992 token-ring access method and physical layer device. The digital phase-locked loop (PLL) technology achieves precise control over PLL loop characteristics. Designers expect good jitter tolerance (JTOL) performance while maintaining low levels of accumulated phase slope (APS). These design guidelines are for a token-ring physical layer device based on the CMOS TI380C60. The interface between the device and the TI380C25, TI380C26, and TI380C27 communications processors are described along with brief suggestions for hub and repeater applications where a processor is not present.

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