THE TMS320 FAMILY OF DIGITAL SIGNAL PROCESSORS (CONTAINS SCANNED TEXT)

The introduction of the TMS320C30 Digital Signal Processor, a floating-point 33-MFLOP device, allows users to represent multi-length floating-point math in terms of single length floating-point math. This allows applications which need this type of power (digital filtering, image processing, FFTs, etc.) to be much more accurate. This chapter explains how to extend the available precision of floating-point arithmetic on the TMS320C30. It is organized as follows:

- A description of the TMS320C30 DSP floating-point number representation

- A discussion of doublelength arithmetic and some basic definitions

- A discussion of the algorithms used along with the TMS320C30 implementation

- Error analysis

- Information about generating C-callable functions from assembly language routines Accompanying graphics illustrate

- Single precision floating point format of the TMS320C30

- Singlelength and doublelength addition

- Singlelength and doublelength procude

- Doublelength quotient and square root

The chapter closes with a summary, a list of references, and three appendices which provide source listings for the extended-precision arithmetic.

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