



ACOUSTIC ECHO CANCELLATION ALGORITHMS AND IMPLEMENTATION ON THE TMS320C80 DSPAcoustic echo cancellation on the TMS320C8x multiprocessor digital signal processor (DSP) offers high performance and flexibility to meet varying user needs. This document describes the implementation of an integrated N-tap digital acoustic echo canceller on the TMS320C8x parallel processor (PP). A brief discussion of a generic echo cancellation algorithm is provided. A 512-tap (64-ms span) echo canceller on a TMS320C8x is described in detail with software logic and flow for each program module. The appendices provide C source code for this application. View the complete PDF document: spra063.pdf (190 K Bytes) (Requires Acrobat Reader 3.x) Go to the Engineering Design Center to locate information on other TI Semiconductor devices.
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