ENDIANNESS AND THE TSB12LV41 (MPEG2LYNX) MICROPROCESSOR INTERFACE

A never-ending source of confusion for users of microprocessors, microcontrollers and their peripherals is the topic of endianness. Endianness refers to the way data is referenced and stored in a processor's memory. TI's TSB12LV41 (MPEG2Lynx) is a 1394-1995 Link Layer controller, designed to support the IEC61883 standard for transmitting and receiving MPEG2 Transport Streams on a 1394 network. The TSB12LV41 supports three types of processors; the ARM7TDMI ("Thumb") processor, as well as Motorola 68000 and Intel 8051 type processors. The Configuration Register space of the TSB12LV41 is Big Endian, however the TSB12LV41's microprocessor interface is designed to support both Big Endian and Little Endian processor types. This document describes how data is stored in both types of endianness domains and gives instructive examples of how both types of processors can read and write to the Configuration Registers inside the TSB12LV41.

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