



BUILT-IN SELF-TEST (BIST) USING BOUNDARY SCANThe IEEE standard boundary scan framework and four-wire serial testablity are having a positive impact on testing all levels of electronic assembly. The two form a basis from which other techniques are developed to facilitate testing of chips and systems. This document shows how existing architectures can be modified to conform to IEEE 1149.1 architecture. A boundary BIST approach is described and compared to a purely scan operated boundary test approach. View the complete PDF document: scta043a.pdf (58 K Bytes) (Requires Acrobat Reader 3.x) Go to the Engineering Design Center to locate information on other TI Semiconductor devices.
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