IMPACT OF JTAG/IEEE 1149.1 TESTABILITY ON RELIABILITY

The industry is imposing increasingly aggressive testability requirements on modern electronics development. Existing designs require additional hardware modifications to provide all the testability functions. The JTAG/IEEE 1149.1 specification for 4-wire test bus interfaces or boundary-scan architecture provides a standard for built in testability functions. This document discusses the reliability of these functions for the ad hoc case and the 1149.1 compliant case. A simple test case is presented for ad hoc and 1149.1 designs with the test results analyzed.

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