



BOUNDARY SCAN SPEEDS STATIC MEMORY TESTSThe steady increase in memory densities used in microprocessor based systems has stretched functional test times. The boundary scan standard IEEE 1149.1 offers a solution to the problem of testing static memory by supplying the access needed to control built-in-self-test (BIST) functions. This document describes generation patterns, using parallel signature analysis (PSA), and BIST generated waveforms to speed static memory testing. View the complete PDF document: scta030.pdf (691 K Bytes) (Requires Acrobat Reader 3.x) Go to the Engineering Design Center to locate information on other TI Semiconductor devices.
![]() ![]() ![]() ![]() (c) Copyright 1998 Texas Instruments Incorporated. All rights reserved. Trademarks, Important Notice! |