MINIMIZING CLOCK DRIVER OUTPUT SKEW USING GANGED OUTPUTSThis document helps designers use existing clock-driver products to drive large loads while maintaining a minimum amount of skew between the device outputs. The emphasis of this document is using parallel or ganged outputs to drive loads. A performance evaluation of the CDC201 is provided. View the complete PDF document: scaa032.pdf (49 K Bytes) (Requires Acrobat Reader 3.x) Go to the Engineering Design Center to locate information on other TI Semiconductor devices.
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