



OPTIMIZING DSP-BASED DIGITAL FILTERS WITH APPLICATION-SPECIFIC FIFOSThe TI SN74ACT36xx 36-bit clocked FIFO family interfaces to a 32-bit floating-point DSP, allowing high-integrity data transfer and improving system throughput. This document describes the patented synchronous retransmit FIFO feature used with a DSP for FIR digital filtering. Two examples of DSP application specific FIFOs are given. The first uses the unidirectional SN74ACT3641 (1024 ´ 36) FIFO and the second uses the SN74ACT3638 (512 ´ 32 ´ 2) bi-directional clocked FIFO. View the complete PDF document: scaa021.pdf (83 K Bytes) (Requires Acrobat Reader 3.x) Go to the Engineering Design Center to locate information on other TI Semiconductor devices.
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