Multi-Rate CELP Vocoder
for TMS320C5x
by DSP Software Engineering, Inc.

Software Overview

Multi-Rate CELP (MRCELP) is a speech encoding/decoding algorithm developed by DSPSE that provides 
4-kHz speech bandwidth at either 4.8, 7.2, or 9.6 kbps. The algorithm has been fully implemented on 
a single TMS320C2x or TMS320C5x DSP.  This product incorporates state of the art speech-coding 
techniques in conjunction with a proprietary codebook search to produce toll-quality speech at 9.6 
kbps and near-toll-quality speech at 4.8 and 7.2 kbps. The algorithmic delay of MRCELP is 9.4 ms at 
4.8 kbps and 7.5 ms at 7.2 and 9.6 kbps.
MRCELP encodes frames containing 200 or 160 samples of 16-bit linear-PCM data into frames of 120-, 
144-, or 192-bit code words. MRCELP is ideally suited for applications requiring high-quality 
speech coding while minimizing total system costs.  Typical applications include high-compression 
digital tape recorders, secure communications, personal communications networks, land mobile 
radios, tactical communications, and voice mail systems.

Features and Benefits

•	High-quality voice coding on a single fixed-point DSP
•	In-band synchronization capable
•	Capable of multi-channel operation
•	SPOX compatible
•	Provides 4.8-, 7.2-, or 9.6-kbps voice compression

Processor and System Requirements

•	Devices supported: TMS320C5x
•	Algorithm category: Vocoder
•	Requirements:
All memory requirements are in units of 16-bit words. The MIPS ratings presented require the listed 
amounts of dual-access RAM (DARAM) and zero-wait-state program and data memory. All measurements 
were made using an executable demonstration built for a third-party PC plug-in board.
Function
MIPs-4.8
MIPs-7.2
MIPs-9.6
DARAM
Data
Program
Encoder (half duplex)
12.4
14.3
14.8
902
902
5.5 k
Decoder (half duplex)
2.9
3.3
3.3
545
545
4.0 k
Full Duplex*
15.3
17.6
18.1
902
1.3 k
7.2 k

User Functions

The MRCELP implementation consists of two C-callable functions that perform encoding and decoding 
operations. It also includes functions for initializing the encoder and decoder. The encoder and 
decoder interface with arrays of linear-PCM samples and 120-, 144-, or 192-bit code words (rate 
dependent).
MRCELP Encoder
MRE_create (...)
Initializes data memory for the encoder
MRE_delete (...)
Releases data memory allocated for the encoder
MRE_encode (...)
Encodes a frame of linear-PCM samples into a frame of code words
MRCELP Decoder
MRD_create (...)
Initializes data memory for the decoder
MRD_decode (...)
Decodes a frame of code words into a frame of linear-PCM samples
MRD_delete (...)
Releases data memory allocated for the decoder

Algorithm Verification

•	Call DSPSE for verification details

Availability

•	Source and Object code currently available for licensing.

Company Background and Contact Information

DSP Software Engineering, Inc. is a leading provider of highly-complex digital-signal-processing 
software.

Contact:	DSP Software Engineering, Inc
		175 Middlesex Turnpike
		Bedford, MA 01730  USA
		(617) 275-3733
		Fax: (617) 275-4323
		e-mail:  info@dspse.com
		www:  http://www.dspnet.com