Slide 45 of 97
Notes:
Let’s see what happens when this code, or this fetch packet, goes through the pipeline. While most pipelines consist of fetch, decode, and execute, the C6x pipeline breaks each major stage down into sub-stages.
The program fetch stage consists of four sub-stages: a PG or program generate sub-stage where the address of the fetch packet is generated, a PS or program send sub-stage where the address of the fetch packet is sent out to memory, a PW or program write sub-stage where we wait for the memory to send back the fetch packet, and a PR or program read sub-stage, where the instruction is actually read.
The decode stage of the pipeline has two sub-stages: DP or dispatch where the instruction is sent to the functional unit that's going to execute it, and DC or decode which will actually decode the instruction at the functional unit. It's at the dispatch stage that we figure out where the instruction is going to go. What's powerful about this is that it is not done in hardware. It’s done at compile or assemble time by the software tools. The tools are assigning the functional units, or in effect, scheduling the code.
The last stage is the execute stage. It's in this stage that the instruction is actually executed. The execute stage consists of sub-stages E1 through E6. The instruction is executed in E1,and E2 through E6 exist for the purposes of delay slots during which results of some instructions will be recognized.
