C54x Internal Buses

PROGRAM / DATA BUSES

PERIPHERAL BUS

TO MEMORY

TO CORE

TO PERIPHERALS

D(15-0)

A(15-0)

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There are four main buses for data and instruction movement: the program bus (or instruction bus), and three data buses, two for reads and one for writes.

The bus structure also include four additional buses: the peripheral bus, two accumulator buses, and a multiplier bus.

The accumulator & multiplier buses can be thought of as a data highway. We need to move data from the accumulators back to the multiplier, to the ALU, and to the shifter in order to write an answer to a write bus. Without additional buses for the accumulators and for the multiplier, we would have an architectural bottleneck at the main buses. The additional buses provide increased throughput to maximize the performance of the C54x DSP.