TMS320LC56 Features

The TMS320LC56 provides greater integration of on-chip ROM than the 'C53. With 32K 16-bit words of on-chip ROM and 7K 16-bit words of on-chip RAM, the 'LC56 can accommodate large program and data spaces on-chip, thereby minimizing off-chip accesses. The 'LC56 also provides a very fast buffered serial port (BSP) capable of 40 Mbps at 25-ns instruction cycle time. The 'LC56 is optimized for high-performance, low-power applications; as a result, it operates at 3.3 V only.

Key features of the TMS320LC56 are:

• 25- and 35-ns instruction cycle times at 3.3 V
• 192K-word external address reach
• Accepts source code from the 'C1x/'C2x/'C2xx generations
• ANSI C compiler
• IEEE 1149.1-standard (JTAG) emulator control
• Boot ROM option
• Programmable PLL
• Full-duplex synchronous serial port
• Buffered serial port with dedicated bus
• 100-pin TQFP package

TMS320LC56/'LC57/'BC57S Buffered Serial Port

The buffered serial port (BSP) provides a no-overhead mechanism to interface serially with CODECs, ADCs, and other peripherals. The BSP supports 8-, 10-, 12-, and 16-bit serial data packets and uses a 2K-byte buffer to hold input or output data. Downward code compatible with the standard serial ports, the BSP is designed to be completely flexible and programmable. The BSP has the ability to simultaneously receive data from and transmit data to a programmable on-chip buffer via a dedicated memory bus, freeing the CPU to execute other tasks without memory bus contention.