TMS320C51 Features

In the TMS320C51, the 'C50's 9K-word block of RAM is replaced by 8K 16-bit words of on-chip ROM. This provides a considerable advantage in cost and performance for users who require large amounts of on-chip program space. With this ROM and 2K 16-bit words of RAM, sophisticated DSP algorithms can fit on a single device. This device is available in a 132-pin PQFP and a 100-pin TQFP that measures only 14 ´ 14 ´ 1.4 mm, for designs that require both small board area and reduced height.

Features included on the TMS320C51 are:

• 20-, 25-, 35-, and 50-ns instruction cycle times
• 192K-word external address reach
• Accepts source code from the 'C1x/'C2x/'C2xx generations
• ANSI C compiler
• IEEE 1149.1-standard (JTAG) emulator control
• Boot ROM option
• Full-duplex synchronous serial port
• TDM serial port
• 132-pin PQFP and 100-pin TQFP packages