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TMS320LC206 Features
The 'LC206 features the core CPU of the 'C2xx generation, several fast,
flexible peripherals, and 32K words of ROM memory for high-volume,
low-cost memory integration.
The 'LC206 has the same peripherals as the 'LC203, 'F206, and 'C206 and is
pin-for-pin compatible with the 'LC203, 'F206, and 'C206.
Features of the TMS320LC206 include:
- 25- ns instrument cycle times
- 3.3v core
- 192K-word external address reach
- 4.5 K-word on-chip RAM
- 32K 16-bit words of ROM memory
- Accepts source code from the TMS320C1x/'C2x generations
- ANSI C compiler
- 2, ´1, ´2, and
´4 PLL options
- IEEE 1149.1-standard (JTAG) emulator control
- Full-duplex enhanced synchronous serial port (ESSP) with 4-deep FIFO
- Full-duplex asynchronous serial port (UART)
- 100-pin TQFP package
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