 | TI introduces 0.18-micron TImeline Technology |
Employing 0.18-micron technology (leff-effective gate length), TI's recently announced TImeline Technology can pack 125 million transistors onto a single piece of silicon, shaping the most advanced systems integration platform ever available. This platform extends TI's five years of leadership in building application specific integrated circuit (ASIC)-based customizable DSP (cDSP) solutions and slashing time to market for TMS320 customers.
As DSP becomes more widespread in consumer, communications, computer, and automotive applications, the need for application-specific and custom devices increases. TI's cDSP technology, along with TImeline Technology, surpasses all other technology available today in meeting this need.
The density achieved with TI's 0.18-micron technology means that dynamic random-access memory (DRAM), static random-access memory (SRAM), Flash memory, and read-only memory (ROM) can reside on the same chip with DSPs, communications interfaces, analog-to-digital and digital-to-analog converters, and other peripherals. The result is a true, single-chip DSP Solution for many high-volume communications, computing, and high-performance applications.
Equally important, the enormous integration capacity achieved with TI's TImeline Technology more than twice that available with current 0.25-micron technologies-can slash development cycles by as much as half. Rather than struggle for devices that fit within semiconductor limitations, designers can select DSPs and other modules from TI libraries or select their own logic to create a unique proprietary solution. An important part of TI's strategy of providing comprehensive DSP solutions, cDSP technology uses industry-standard ASIC design tools to combine DSP cores and peripherals with TI's gate array and standard cell ASIC libraries.
Designing with cDSP benefits customers throughout multiple stages in the product roadmap. Engineers can choose one of TI's standard or application-specific DSPs that offers quick time to market and a low investment risk for many emerging markets. Since few original equipment manufacturers (OEMs) have both the DSP design expertise and the ASIC expertise required to create these devices, TI can save cost and time by providing them with tailored products.
Designers that begin with standard TMS320 DSPs may find that as their products become successful, they want to customize their processors as they move into higher volumes. For these designers, cDSP offers a way to migrate the same standard TMS320 core to greater levels of system integration, while shrinking time to market and lowering costs.
TI's multiple wafer fabs, seven devoted to DSP production, allow for rapid response to production increases and long-term supply in tight markets. With 50 designs already complete and more than 30 million units shipped to date, cDSP is a proven technology. Also, the addition of 0.18-micron technology to TI's 0.65-micron, 0.5-micron, 0.35-micron, and 0.25-micron capabilities, along with the $2 billion DMOS 6 megafab complex in Dallas, gives Texas Instruments the most complete submicron technology portfolio in the industry. Initial design engagements employing the TImeline Techno-logy are currently in progress and TI plans to begin work with beta customers in the third quarter of 1996. Production is scheduled to begin in 1997.