Ideal for telecommunications systems requiring multiple digital signal processors, the new TMS320C44 brings the cost of floating-point DSPs to a level that makes them viable for high-volume, multiprocessor, telecom applications. At U.S. suggested resale of $99 each in 10,000 unit quantities, the 'C44 is the first multiprocessing-focused DSP to break the $100 barrier.
The 'C44 is a direct off-shoot of the first DSP specifically designed for multiprocessor architectures-the TMS320C40, introduced in 1990. It differs from the 'C40 in that it has a reduced pin count, is packaged in low-cost plastic, and has reduced power features with special power management capabilities. Because of its breakthrough price/performance, the 'C44 is already being designed into telecommunications infrastructure products such as cellular base stations, satellite communication stations, fixed cellular stations, secure phone systems, and central office systems.
The 'C44's communication ports are enhanced with port direction pins and a port reset function to ease interprocessor interfacing in parallel-processor designs. The 'C44 maintains the same dual-bus architecture as the 'C40, allowing the processor to access both local and global memory space to provide superior data throughput in shared-memory multiprocessor systems.
Packaged in a 304-pin, plastic quad flatpack (PQFP) package, the surface-mountable 'C44 uses 0.72 micron, double-level-metal CMOS process technology to achieve a reduced die size that allows it to consume 10 percent less power than the 'C40. Also, the new clock-stop power-down mode feature can place the processor in a sleep-state, reducing the chip's power drain to the uA range, a benefit for power-sensitive applications such as cellular base stations. This ability to reduce power consumption during non-peak usage will allow tremendous cost savings for high-volume telecommunications equipment.
Because the 'C44 is object-code compatible with the 'C40, the existing software infrastructure of high-level language support, parallel debuggers, and third-party software algorithms are all available now to 'C44 developers. Tools include TI's XDS510 emulator which utilizes the JTAG interface on the 'C44 to provide a multi-processor debug environment. A parallel runtime support library allows easy implementation of interprocessor communication, and an optimized C compiler, assembler, linker, and state-accurate simulator are also available. The 'C44 is currently available in 40-MHz (40 MFLOPS), and 50-MHz (50 MFLOPS). A 60-MHz (60 MFLOPS) version will be available in 2Q95.