head     56.3;
access   paws bayes jws quist brad dew jwh;
symbols  ;
locks    ; strict;
comment  @# @;


56.3
date     93.01.27.13.25.32;  author jwh;  state Exp;
branches ;
next     56.2;

56.2
date     93.01.27.12.04.26;  author jwh;  state Exp;
branches ;
next     56.1;

56.1
date     91.11.05.09.44.56;  author jwh;  state Exp;
branches ;
next     55.1;

55.1
date     91.08.25.10.22.59;  author jwh;  state Exp;
branches ;
next     54.1;

54.1
date     91.03.18.15.26.35;  author jwh;  state Exp;
branches ;
next     53.1;

53.1
date     91.03.11.19.27.42;  author jwh;  state Exp;
branches ;
next     52.2;

52.2
date     91.02.28.11.27.21;  author jwh;  state Exp;
branches ;
next     52.1;

52.1
date     91.02.19.09.11.40;  author jwh;  state Exp;
branches ;
next     51.1;

51.1
date     91.01.30.16.11.17;  author jwh;  state Exp;
branches ;
next     50.1;

50.1
date     90.10.29.16.26.06;  author jwh;  state Exp;
branches ;
next     49.1;

49.1
date     90.08.14.14.10.22;  author jwh;  state Exp;
branches ;
next     48.1;

48.1
date     90.07.26.11.16.26;  author jwh;  state Exp;
branches ;
next     47.1;

47.1
date     90.05.14.10.59.01;  author dew;  state Exp;
branches ;
next     46.1;

46.1
date     90.05.07.08.46.11;  author jwh;  state Exp;
branches ;
next     45.1;

45.1
date     90.04.19.15.53.59;  author jwh;  state Exp;
branches ;
next     44.1;

44.1
date     90.04.01.22.11.10;  author jwh;  state Exp;
branches ;
next     43.1;

43.1
date     90.03.20.14.02.51;  author jwh;  state Exp;
branches ;
next     42.1;

42.1
date     90.01.23.17.47.45;  author jwh;  state Exp;
branches ;
next     41.1;

41.1
date     89.12.22.11.29.56;  author jwh;  state Exp;
branches ;
next     40.1;

40.1
date     89.09.29.11.51.57;  author jwh;  state Exp;
branches ;
next     39.1;

39.1
date     89.09.26.16.36.10;  author dew;  state Exp;
branches ;
next     38.1;

38.1
date     89.08.29.11.28.14;  author jwh;  state Exp;
branches ;
next     37.1;

37.1
date     89.05.12.11.40.39;  author dew;  state Exp;
branches ;
next     36.1;

36.1
date     89.02.06.10.19.01;  author dew;  state Exp;
branches ;
next     35.1;

35.1
date     89.02.02.13.33.50;  author dew;  state Exp;
branches ;
next     34.1;

34.1
date     89.01.23.16.08.50;  author jwh;  state Exp;
branches ;
next     33.1;

33.1
date     89.01.16.11.41.01;  author dew;  state Exp;
branches ;
next     32.1;

32.1
date     89.01.10.11.49.25;  author bayes;  state Exp;
branches ;
next     31.1;

31.1
date     88.12.14.18.10.36;  author bayes;  state Exp;
branches ;
next     30.1;

30.1
date     88.12.09.13.47.37;  author dew;  state Exp;
branches ;
next     29.1;

29.1
date     88.10.31.15.32.30;  author bayes;  state Exp;
branches ;
next     28.1;

28.1
date     88.10.06.10.59.34;  author dew;  state Exp;
branches ;
next     27.1;

27.1
date     88.09.29.11.33.41;  author bayes;  state Exp;
branches ;
next     26.1;

26.1
date     88.09.28.13.13.51;  author bayes;  state Exp;
branches ;
next     25.1;

25.1
date     88.03.02.09.30.22;  author bayes;  state Exp;
branches ;
next     24.1;

24.1
date     87.08.31.09.50.51;  author jws;  state Exp;
branches ;
next     23.1;

23.1
date     87.08.26.10.28.20;  author bayes;  state Exp;
branches ;
next     22.1;

22.1
date     87.08.17.11.15.04;  author bayes;  state Exp;
branches ;
next     21.1;

21.1
date     87.08.12.13.57.09;  author bayes;  state Exp;
branches ;
next     20.1;

20.1
date     87.07.30.11.10.18;  author bayes;  state Exp;
branches ;
next     19.1;

19.1
date     87.06.01.08.25.59;  author jws;  state Exp;
branches ;
next     18.1;

18.1
date     87.05.20.15.24.59;  author bayes;  state Exp;
branches ;
next     17.1;

17.1
date     87.04.30.10.36.34;  author jws;  state Exp;
branches ;
next     16.1;

16.1
date     87.04.26.15.48.35;  author jws;  state Exp;
branches ;
next     15.1;

15.1
date     87.04.13.09.23.29;  author jws;  state Exp;
branches ;
next     14.1;

14.1
date     87.04.01.15.28.42;  author jws;  state Exp;
branches ;
next     13.1;

13.1
date     87.02.28.18.33.57;  author jws;  state Exp;
branches ;
next     12.1;

12.1
date     87.02.02.13.24.38;  author jws;  state Exp;
branches ;
next     11.1;

11.1
date     87.01.19.09.51.05;  author jws;  state Exp;
branches ;
next     10.1;

10.1
date     86.12.24.10.59.32;  author jws;  state Exp;
branches ;
next     9.1;

9.1
date     86.12.12.14.40.50;  author bayes;  state Exp;
branches ;
next     8.1;

8.1
date     86.11.27.11.57.35;  author jws;  state Exp;
branches ;
next     7.1;

7.1
date     86.11.20.13.47.00;  author hal;  state Exp;
branches ;
next     6.1;

6.1
date     86.11.04.17.59.29;  author paws;  state Exp;
branches ;
next     5.1;

5.1
date     86.10.28.16.48.46;  author hal;  state Exp;
branches ;
next     4.1;

4.1
date     86.09.30.19.48.33;  author hal;  state Exp;
branches ;
next     3.1;

3.1
date     86.09.01.11.58.36;  author hal;  state Exp;
branches ;
next     2.1;

2.1
date     86.07.30.14.45.32;  author hal;  state Exp;
branches ;
next     1.1;

1.1
date     86.06.30.15.11.41;  author danm;  state tmp;
branches ;
next     ;


desc
@Base file for PWS 3.2 release.

@


56.3
log
@
pws2rcs automatic delta on Wed Jan 27 13:14:25 MST 1993
@
text
@	TTL IOLIB EXTH - HPIB DRIVERS
	PAGE
********************************************************************************
*
*       COPYRIGHT (C) 1985 BY HEWLETT-PACKARD COMPANY
*
********************************************************************************
*
*
*       IOLIB     EXTH
*
*
********************************************************************************
*
*
*
*       Library - IOLIB
*       Author  - Tim Mikkelsen
*       Phone   - 303-226-3800  ext. 2910
*
*       Purpose - This set of assembly language code is intended to be used as
*                 a PASCAL module for I/O drivers for use by the external I/O
*                 procedures library.
*
*                 Most of this code is taken from Bob Hallissy's HPL code.
*
*       Date    - 08/18/81
*       Update  - 08/01/83
*       Release -  7/12/85
*
*
*       Source  - IOLIB:HPIB.TEXT
*       Object  - IOLIB:HPIB.CODE
*
*
********************************************************************************
*
*
*       RELEASED
*       VERSION         3.1
*
*
********************************************************************************
	 PAGE
****************************************************************************
*                                                                          *
*                                                                          *
*      BUG FIX HISTORY         - after release 1.0                         *
*                                                                          *
*                                                                          *
*      BUG #   BY  / ON        LOC             DESCRIPTION                 *
*      -----   -----------     --------------  ----------------------      *
*                                                                          *
*      SPR695  T Mikkelsen     HPL_WTC         the HPIB cards will not     *
*              04/21/1982                      respond properly to a PPC/  *
*                                              PPE setup of ppoll info     *
*                                                                          *
*      SPR740  T Mikkelsen     H_TID           DMA input transfers will    *
*              05/28/1982                      not terminate properly if   *
*                                              there is an EOI termination *
*                                              and EOI is true on the      *
*                                              first byte and the byte     *
*                                              comes in immediately.  This *
*                                              is a big problem for disk   *
*                                              transfers.                  *
*                                                                          *
*      SPRxxx  T Mikkelsen     H_BYTTST        DMA input transfers will    *
*              06/14/1982                      not terminate properly if   *
*              07/21/1982                      the device is very fast and *
*                                              EOI is true on the last     *
*                                              byte.  Due to DMA on lvl 3  *
*                                              and an external HPIB card   *
*                                              on lvl 4,5, or 6.           *
*                                                                          *
*      475     T Mikkelsen     all over        Change BSRs into JSRs to    *
*              09/17/1982                      allow re-placement of the   *
*                                              modules.  Also in GPIO and  *
*                                              Data Comm.                  *
*                                                                          *
*      564     T Mikkelsen     H_WTC_PPC       IOCONTROL(sc,2,x) does not  *
*              10/22/1982                      work - set up PPOLL byte.   *
*                                              Always responds with a      *
*                                              PPOLL response of 4.        *
*                                                                          *
****************************************************************************
*                                                                          *
*                                                                          *
*                                                                          *
*      BUG FIX HISTORY         - after release 2.0                         *
*                                                                          *
*                                                                          *
*      BUG #   BY  / ON        LOC             DESCRIPTION                 *
*      -----   -----------     --------------  ----------------------      *
*                                                                          *
*      qqqq    T Mikkelsen     H_TID           Non active controller DMA   *
*              12/16/1982                      transfers do not work.      *
*                                              They mess up the count.     *
*                                                                          *
*      rrrr    T Mikkelsen     H_EIR           Re-enabling interrupts when *
*              12/17/1982                      srq is already asserted do  *
*                                              not work.                   *
*                                                                          *
*      wuwu    T Mikkelsen     H_DMATERM       Re-enabling interrupts when *
*              01/19/1983                      ON EOT routine is called    *
*                                              due to flukey term emulator *
*                                              problem.                    *
*                                                                          *
*      hphp    T Mikkelsen     H_INIT_S        Allowing DMA non-ctlr tfrs  *
*              01/28/1983      H_EIR           to be started from inside   *
*                              H_DMATERM       user ISR.                   *
*                              H_ISR                                       *
*                              H_TFR                                       *
*                              H_ENABLE H_DISABLE                          *
*                                                                          *
*      ????    J Cowan         H_T_FHS         Even though FHS with the    *
*              02/02/1983                      internal HPIB to Coyote     *
*                                              makes the interleave, FHS   *
*                                              with the external HPIB to   *
*                                              Coyote does not!!!          *
*                                                                          *
*      tttt    J Schmidt       H_WAIT_BO       Timing changes for 680xx    *
*              08/01/1983      H_WAIT_BI       processors on UMM CPU boards*
*              05/02/1984      H_P_POLL                                   *
*                              H_IFC                                       *
*                              H_ISR0                                      *
*                                                                          *
****************************************************************************
	PAGE
********************************************************************************
*
*
*       The following lines are used to tell the LINKER/LOADER what this module
*       looks like in PASCAL terms.
*
*       Note that it is possible to create assembly modules that are functions.
*       These routines are called through an indirect pointer using the CALL
*       facility which does NOT permit functions.
*
*       This module is called 'EXTH' ( upper or lower case - doesn't matter )
*       independent of the file name ( by use of the MNAME pseudo-op ).
*
*       All the externally used procedures are called 'EXTH_@@@@@@@@@@@@@@@@' in
*       this module.  If you are using assembly to access them use the
*       'EXTH_@@@@@@@@@@@@@@' name.  If you are using Pascal use the '@@@@@@@@@@@@@@'
*       name.
*
********************************************************************************
	MNAME EXTH
	SRC MODULE EXTH;
	SRC IMPORT iodeclarations;
	SRC EXPORT
	SRC        PROCEDURE eh_init  ( temp : ANYPTR );
	SRC        PROCEDURE eh_isr   ( temp : ANYPTR );
	SRC        PROCEDURE eh_rdb   ( temp : ANYPTR ;  VAR x : CHAR);
	SRC        PROCEDURE eh_wtb   ( temp : ANYPTR ;  val   : CHAR);
	SRC        PROCEDURE eh_rdw   ( temp : ANYPTR ;  VAR x : io_word);
	SRC        PROCEDURE eh_wtw   ( temp : ANYPTR ;  val   : io_word);
	SRC        PROCEDURE eh_rds   ( temp : ANYPTR ;  reg   : io_word;
	SRC                                              VAR x : io_word);
	SRC        PROCEDURE eh_wtc   ( temp : ANYPTR ;  reg   : io_word;
	SRC                                              val   : io_word );
	SRC        PROCEDURE eh_tfr   ( temp : ANYPTR ;  bcb   : ANYPTR );
	SRC        PROCEDURE eh_send  ( temp : ANYPTR ;  val   : CHAR );
	SRC        PROCEDURE eh_end   ( temp : ANYPTR ;  VAR x : BOOLEAN );
	SRC        PROCEDURE eh_ppoll ( temp : ANYPTR ;  VAR x : CHAR );
	SRC        PROCEDURE eh_clr   ( temp : ANYPTR ;  line  : io_bit );
	SRC        PROCEDURE eh_set   ( temp : ANYPTR ;  line  : io_bit );
	SRC        PROCEDURE eh_test  ( temp : ANYPTR ;  line  : io_bit ;
	SRC                                              VAR x : BOOLEAN );
	SRC END; { of EXTH }
	PAGE
********************************************************************************
*
*       SYMBOLS FOR EXPORT AS PROCEDURE NAMES
*
********************************************************************************
	DEF EXTH_EXTH
	SPC 1
	DEF EXTH_EH_INIT
	DEF EXTH_EH_ISR,EXTH_EH_TDMA
	DEF EXTH_EH_RDB,EXTH_EH_WTB
	DEF EXTH_EH_RDW,EXTH_EH_WTW
	DEF EXTH_EH_RDS,EXTH_EH_WTC
	DEF EXTH_EH_TFR
	SPC 1
	DEF EXTH_EH_SEND,EXTH_EH_PPOLL,EXTH_EH_SET
	DEF EXTH_EH_CLR,EXTH_EH_TEST,EXTH_EH_END
	SPC 5
********************************************************************************
*
*       SYMBOLS FOR IMPORT - COMMON ASSEMBLY LANGUAGE ROUTINES
*
*       THE ROUTINES ARE IN THE MODULE COMMON_ASSEMBLY
*       THE TIMER ROUTINES ARE IN THE FILE "POWERUP"
*
********************************************************************************
	REFA DROPDMA            give up dma resource
	REFA GETDMA             actually get dma
	REFA TESTDMA            check to see if dma is available
	REFA LOGINT             branch to user isr
	REFA LOGEOT             branch to user eot
	REFA STBSY              set buffer busy
	REFA STCLR              set buffer not busy
	REFA DMA_STBSY          set buffer dma busy
	REFA ITXFR              is there a tfr active ?
	REFA ABORT_IO           kill any tfr active
	REFA WAIT_TFR           timed wait for tfr active
	REFA CHECK_TFR          timed wait for tfr - direction
	REFA DELAY_TIMER        timed delay
	REFA CHECK_TIMER        timed wait for timeout checking

*       change references to allow long jumps when the I/O      475 JPC 9/17/82
*       modules get moved around                                475 JPC 9/17/82
	LMODE   DROPDMA,GETDMA,TESTDMA,LOGINT,LOGEOT,STBSY
	LMODE   STCLR,DMA_STBSY,ITXFR,ABORT_IO,WAIT_TFR,CHECK_TFR
	LMODE   DELAY_TIMER,CHECK_TIMER

	TTL IOLIB EXTH - COMMON EQUATES AND DEFINITIONS
	PAGE
	INCLUDE IOLIB:COMDCL
	TTL IOLIB EXTH - HPIB DRIVER EQUATES
	PAGE
*
H_INT0COPY  EQU AVAIL_OFF+0     COPY OF INT0STAT REGISTER
H_INT1COPY  EQU AVAIL_OFF+1     COPY OF INT1STAT REGISTER
H_INTMSKSAV EQU AVAIL_OFF+2     COPY OF INT0MASK & INT1MASK
H_STAT3     EQU AVAIL_OFF+4     STATUS BYTE 3 MASK:
*                                   BIT 0:  EOR LATCH
*                                   BITS 1-7: 0
H_FLAGS     EQU AVAIL_OFF+5     DRIVER FLAGS AND STATUS BYTE 0 MASK:
*                                   BIT 0:  PASS CONTROL FLAG
*                                   BIT 1:  USER ISR TO BE CALLED ( IN ISR )
*                                   BIT 2:  ERROR INDICATOR
*                                   BIT 3:  IFC INDICATOR
*                                   BIT 4:  DCL INDICATOR
*                                   BIT 5:  GET INDICATOR
*                                   BIT 6:  CURRENT rsv STATUS BIT.
*                                   BIT 7:  IF SET, 9914 IS IN HOLDOFF MODE, THEREFORE
*                                           ISSUE RELEASE HOLD OFF BEFORE READING, AND
*                                           USE TAKE CONTROL SYNC TO SET ATN.
H_PPOLLMSK  EQU AVAIL_OFF+6     VALUE TO PUT IN H_PPOLL WHEN ist = 1
*           EQU AVAIL_OFF+7     VALUE TO PUT IN H_PPOLL WHEN ist = 0
	    SPC 4
	    TTL IOLIB EXTH - PASCAL ENTRY POINTS
	    PAGE
********************************************************************************
*
*         PASCAL DRIVER ENTRY POINTS FOR HP-IB CARDS
*
********************************************************************************
	  SPC 1
*
*         Module initialization
*
EXTH_EXTH EQU *
	  RTS                   Do nothing
*
*         Driver initialization
*
EXTH_EH_INIT    EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_INIT
*
*         Interrupt service routine
*
EXTH_EH_ISR     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_ISR
*
*         HPIB DMA transfer termination routine
*
EXTH_EH_TDMA    EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_DMATERM
*
*         Read a byte
*
EXTH_EH_RDB     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get VAR address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BSR     H_RDB         call read byte
	  MOVE.B  D0,(A3)       save character
	  RTS
*
*         Write a byte
*
EXTH_EH_WTB     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVE.B  (SP)+,D0      get value           ( this actually bumps SP by 2 )
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_WTB         call write byte
*
*         Read a word
*
EXTH_EH_RDW     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get VAR address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BSR     H_RDB         call read byte
	  MOVE.B  D0,D5         save byte
	  BSR     H_RDB         read second byte
	  LSL.W   #8,D5         shift first by
	  MOVE.B  D0,D5         bring in low bits
	  MOVE.W  D5,(A3)       save word
	  RTS
*
*         Write a word
*
EXTH_EH_WTW     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVE.W  (SP)+,D0      get word value
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  MOVE.B  D0,D5         save second byte
	  LSR     #8,D0
	  BSR     H_WTB         write the byte
	  MOVE.B  D5,D0         get the second byte
	  BRA     H_WTB         write the byte
*
*         Read status
*
EXTH_EH_RDS     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get VAR address
	  MOVE.W  (SP)+,D1      get register number
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BSR     H_RDS         read status
	  MOVE.W  D0,(A3)       save status info
	  RTS
*
*         Write control
*
EXTH_EH_WTC     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVE.W  (SP)+,D0      get value
	  MOVE.W  (SP)+,D1      get register number
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_WTC         write control
*
*         Transfer
*
EXTH_EH_TFR     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get buffer control block address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_TFR         transfer
*
*         Send an 'ATN' true command
*
EXTH_EH_SEND    EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVE.B  (SP)+,D0      get value          ( this actually bumps SP by 2 )
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_R6OUT       send command byte
*
*         Perform a Parallel Poll
*
EXTH_EH_PPOLL   EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get VAR address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BSR     H_P_POLL      do a parallel poll
	  MOVE.B  D0,(A3)       save value
	  RTS
*
*         Set an HPIB line
*
EXTH_EH_SET     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVE.W  (SP)+,D1      get line           ( this actually bumps SP by 2 )
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_SET         call set line
*
*         Clear an HPIB line
*
EXTH_EH_CLR     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVE.W  (SP)+,D1      get line           ( this actually bumps SP by 2 )
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_CLR         clear the line
*
*         Test an HPIB line
*
EXTH_EH_TEST    EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get VAR address
	  MOVE.W  (SP)+,D1      get line           ( this actually bumps SP by 2 )
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BSR     H_TEST        read status
	  MOVE.B  D0,(A3)       save character
	  RTS
*
*         Test for EOI/END condition
*
EXTH_EH_END     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get VAR address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  MOVE.B  H_STAT3(A2),D0 get EOR bit
	  ANDI.B  #1,D0         mask it off
	  MOVE.B  D0,(A3)       save condition
	  RTS
	  TTL IOLIB EXTH - HPIB CARD DECLARATIONS
	  PAGE
********************************************************************************
*
*       ADDRESS CONSTANTS
*
********************************************************************************
H_INT_CA    EQU $478000         address of internal HP-IB card
	    SPC 4
********************************************************************************
*
*       HP-IB CARD ADDRESS EQUATES  ( OFFSETS FROM A1 )
*
*           for the TI 9914
*
*           HPL DECLARATIONS
*
********************************************************************************
H_EXTSTAT   EQU $05   READ      EXTERNAL STATUS REGISTER
H_INT0STAT  EQU $11   READ      INTERRUPT STATUS REGISTER 0
H_INT0MASK  EQU $11   WRITE     INTERRUPT MASK REGISTER 0
H_INT1STAT  EQU $13   READ      INTERRUPT STATUS REGISTER 1
H_INT1MASK  EQU $13   WRITE     INTERRUPT MASK REGISTER 1
H_ADRSSTAT  EQU $15   READ      ADDRESS STATUS REGISTER
H_BUSSTAT   EQU $17   READ      BUS STATUS REGISTER
H_AUXCMD    EQU $17   WRITE     AUXILLARY COMMAND REGISTER
H_ADDRESS   EQU $19   WRITE     ADDRESS REGISTER
H_SPOLL     EQU $1B   WRITE     SERIAL POLL RESPONSE REGISTER
H_CMDPASS   EQU $1D   READ      COMMAND PASS THROUGH REGISTER
H_PPOLL     EQU $1D   WRITE     PARALLEL RESPONSE REGISTER
H_DATAIN    EQU $1F   READ      DATA IN REGISTER
H_DATAOUT   EQU $1F   WRITE     DATA OUT REGISTER
	    PAGE
********************************************************************************
*
*       HP-IB AUXILLARY COMMAND EQUATES
*
*           for the TI 9914
*
*           HPL DECLARATIONS
*
********************************************************************************
H_SWRST0    EQU $00   FALSE     SOFTWARE RESET
H_SWRST1    EQU $80   TRUE          "      "
H_DACR0     EQU $01   FALSE     RELEASE DAC HOLDOFF
H_DACR1     EQU $81   TRUE         "     "     "
H_RHDF      EQU $02   PULSE     RELEASE RFD HOLDOFF
H_HDFA0     EQU $03   FALSE     HOLDOFF ON ALL DATA
H_HDFA1     EQU $83   TRUE         "     "  "   "
H_HDFE0     EQU $04   FALSE     HOLDOFF ON END
H_HDFE1     EQU $84   TRUE         "     "  "
H_NBAF      EQU $05   PULSE     SET NEW BYTE AVAILABLE
H_FGET0     EQU $06   FALSE     FORCE GROUP EXECUTE TRIGGER
H_FGET1     EQU $86   TRUE        "     "      "       "
H_RTL0      EQU $07   FALSE     RETURN TO LOCAL
H_RTL1      EQU $87   TRUE         "    "   "
H_FEOI      EQU $08   PULSE     FORCE EOI
H_LON0      EQU $09   FALSE     LISTEN ONLY
H_LON1      EQU $89   TRUE        "     "
H_TON0      EQU $0A   FALSE     TALK ONLY
H_TON1      EQU $8A   TRUE       "    "
H_GTS       EQU $0B   PULSE     GO TO STANBY
H_TCA       EQU $0C   PULSE     TAKE CONTROL ASYNCHRONOUSLY
H_TCS       EQU $0D   PULSE     TAKE CONTROL SYNCHRONOUSLY
H_RPP0      EQU $0E   FALSE     REQUEST PARALLEL POLL
H_RPP1      EQU $8E   TRUE         "        "     "
H_SIC0      EQU $0F   FALSE     SEND IFC
H_SIC1      EQU $8F   TRUE        "   "
H_SRE0      EQU $10   FALSE     SEND REN
H_SRE1      EQU $90   TRUE        "   "
H_RQC       EQU $11   PULSE     REQUEST CONTROL
H_RLC       EQU $12   PULSE     RELEASE CONTROL
H_DAI0      EQU $13   FALSE     DISABLE ALL INTERRUPTS
H_DAI1      EQU $93   TRUE         "     "       "
H_PTS       EQU $14   PULSE     PASS THROUGH NEXT SECONDARY
H_STDL0     EQU $15   FALSE     SET T1 DELAY (1200ns)
H_STDL1     EQU $95   TRUE       "  "    "
H_SHDW0     EQU $16   FALSE     SHADOW HANDSHAKE
H_SHDW1     EQU $96   TRUE         "       "
H_VSTDL0    EQU $17   FALSE     SPECIAL SET T1 DELAY FOR 9914A (600ns)
H_VSTDL1    EQU $97   TRUE       "  "    "
	    PAGE
********************************************************************************
*
*       HP-IB command equates
*
*           PASCAL DECLARATIONS
*
********************************************************************************
GTL         EQU  1              go to local
SDC         EQU  4              selective device clear
PPC         EQU  5              ppoll configure
GET         EQU  8              group execute trigger
TCT         EQU  9              take control
LLO         EQU  17             local lockout
DCL         EQU  20             device clear
PPU         EQU  21             ppoll unconfigure
SPE         EQU  24             spoll enable
SPD         EQU  25             spoll disable
UNL         EQU  63             unlisten
UNT         EQU  95             untalk
PPE         EQU  96             ppoll enable
PPD         EQU  112            ppoll disable
	    TTL IOLIB EXTH - HPIB DRIVERS
	    PAGE

*                                                               wuwu TM 1/19/83
* SET THE PROCESSOR INTERRUPT LEVEL TO THE INTERFACE            wuwu TM 1/19/83
*         CARD'S INTERRUPT LEVEL                                wuwu TM 1/19/83
*                                                               wuwu TM 1/19/83
*       A1 MUST HAVE THE CARD ADDRESS                           wuwu TM 1/19/83
*                                                               wuwu TM 1/19/83
SET_INT_LEVEL   MOVEQ   #0,D0                                   wuwu TM 1/19/83
		CMPA.L  #$478000,A1     THIS THE INTERNAL HPIB?
		BEQ.S   INTLEV_1        BRANCH IF SO
		MOVEQ   #$30,D0         CARD'S INTERRUPT LEVEL MASK
		AND.B   3(A1),D0        INTERRUPT LEVEL IN UPPER NIBBLE
		LSR     #4,D0           SHIFT TO LOWER NIBBLE
INTLEV_1        ADDQ    #3,D0           CONVERT TO PROCESSOR'S INTERRUPT LEVEL
		LSL     #8,D0           SHIFT TO UPPER BYTE
		MOVE    D0,-(SP)        SAVE FOR A MOMENT
		MOVE    SR,D0           CURRENT STATUS REGISTER
		ANDI    #$F8FF,D0       STRIP CURRENT INT LEVEL BITS
		OR      (SP)+,D0        SUBSTITUTE NEW INT LEVEL BITS
		MOVE    D0,SR           SET NEW INTERRUPT LEVEL
		RTS                                             wuwu TM 1/19/83
		PAGE
********************************************************************************
*
*       H_INIT
*
*         INITIALIZE AN HP-IB CARD
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
H_INIT    EQU    *
* tm      MOVE.B MA(A2),D0              ASSUME THIS IS NOT POWER UP AND
	  MOVE.W #21,D0                 ASSUME THIS IS THE INTERNAL CARD
	  BTST   #7,H_EXTSTAT(A1)       SO CHOOSE ADDRESS 21 IF THIS
	  BNE.S  H_INIT_C               IS SYSTEM CONTROLLER ELSE
	  MOVE.W #20,D0                 CHOOSE ADDRESS 20.
H_INIT_C  CMPA.L #H_INT_CA,A1           IS THIS THE INTERNAL CARD?
	  BEQ.S  H_INIT0                IF SO, SKIP
	  MOVE.B H_EXTSTAT(A1),D0       ELSE GET ADDRESS FROM CARD
	  AND    #$1F,D0
	  CMP    #31,D0                 IF CARD SAYS IT IS AT ADDRESS
	  BNE.S  H_INIT0                31, THEN USE ZERO INSTEAD!
	   MOVEQ #0,D0
H_INIT0   MOVE.B #H_SRE0,H_AUXCMD(A1)   set REN false
	  BSR.S  H_INIT_S               START SOFTWARE RESET
	  BNE    H_IFC                  IF SYSTEM CONTROLLER, BRANCH
	  RTS
********************************************************************************
*
*       H_INT_S
*
*         SUBROUTINE USED FOR BOTH  INITIALIZATION AND wtc:
*
*         HPL ROUTINE
*
********************************************************************************
H_INIT_S  MOVE.B #H_SWRST1,H_AUXCMD(A1) START SOFTWARE RESET
	  MOVE.W D0,MA_W(A2)            SAVE MY ADDRESS
	  MOVE.B D0,H_ADDRESS(A1)       AND TELL CARD MY ADDRESS
	  JSR    ABORT_IO               CLEANUP ANY ATTACHED BUFFER
	  LEA    H_AUXCMD(A1),A0        MAKE A0 POINT TO AUX CMD REG
	  MOVEQ  #0,D0                  AND PRELOAD D0 WITH A ZERO
	  MOVE.B #H_STDL1,(A0)          SET T1 DELAY (1200NS)
	  MOVE.B #H_VSTDL1,(A0)         SET T1 DELAY FOR 9914A (600NS)
	  MOVEP  D0,H_INT0MASK(A1)      FOR NOW, CLEAR BOTH INT MASKS
	  MOVE.W D0,H_INT0COPY(A2)      CLEAR COPYS OF INT STAT REGS
	  MOVE.W D0,H_STAT3(A2)         INIT. DRIVER FLAGS
	  MOVE.B #H_HDFA1,(A0)          SET HOLD OFF ON ALL DATA
	  MOVE.B #H_HDFE0,(A0)          CLEAR HOLD OFF ON END
	  MOVE.B #H_RPP0,(A0)           CLEAR PAR. POLL IF ACTIVE.
	  MOVE.B D0,H_SPOLL(A1)         CLEAR SERIAL POLL RESPONSE
	  MOVE.B D0,H_PPOLL(A1)         UNCONFIGURE PARALLEL POLL
	  MOVE.W D0,H_PPOLLMSK(A2)      CLEAR PPOLL MASK
	  MOVE.B #H_SWRST0,(A0)         CLEAR SOFTWARE RESET
* tm      MOVEQ  #0,D0                  SET UP INT MASKS
	  BSR    H_EIR
	  MOVE.B #$80,3(A1)             ENABLE THE CARD       ( hphp TM 1/19/83 )
	  BTST   #7,H_EXTSTAT(A1)       IS THIS A SYSTEM CONTROLLER?
	  RTS                           (LEAVE CC FOR CALLER)
	  PAGE
********************************************************************************
*
*       H_RDB
*
*         READ A BYTE OF DATA FROM HP-IB
*
*         EXIT:   D0.B = BYTE READ
*
*         HPL ROUTINE
*
********************************************************************************
H_RDB     MOVE.B #H_GTS,H_AUXCMD(A1)    CLEAR ATN
	  BTST   #2,H_ADRSSTAT(A1)      MAKE SURE ADDRESSED TO LISTEN
	  BEQ.S  H_LSTERR               ELSE GIVE ERROR
H_RDB0    BCLR   #7,H_FLAGS(A2)         TEST (AND CLEAR) HOLDOFF FLAG
	  BEQ.S  H_RDB1                 IF IT WAS CLEAR, SKIP
	  BCLR   #0,H_STAT3(A2)         CLEAR EOR ( EOI ) FLAG IN TEMPS
	  MOVE.B #H_RHDF,H_AUXCMD(A1)   RELEASE RFD HOLDOFF TO START HS
H_RDB1    BSR    H_WAIT_BI              NOW WAIT FOR BYTE IN
	  MOVEQ  #0,D0                  ELSE CLEAR UPPER PART OF D0
	  MOVE.B H_DATAOUT(A1),D0       AND PUT DATA IN LOWER BYTE
	  RTS                           DONE!
	  SPC    6
********************************************************************************
*
*       H_WTB
*
*         WRITE A BYTE OF DATA TO HP-IB
*
*         ENTRY:  D0.B = BYTE TO WRITE
*
*         HPL ROUTINE
*
********************************************************************************
H_WTB     BTST   #1,H_ADRSSTAT(A1)      MAKE SURE ADDRESSED TO TALK
	  BEQ.S  H_TLKERR               ELSE ERROR
H_WTB0    MOVE.B #H_GTS,H_AUXCMD(A1)    CLEAR ATN
H_WTB1    BSR    H_WAIT_BO              WAIT FOR BYTE OUT
	  MOVE.B D0,H_DATAOUT(A1)       MOVE THE DATA OUT
	  RTS                           DONE!
	  SPC    4
	  TTL IOLIB EXTH - ERROR ESCAPES
	  PAGE
********************************************************************************
*
*       Error escapes
*
********************************************************************************
H_SCBSY   MOVEQ  #SC_BUSY,D0            buffer is busy
	  BRA.S  ESC_ERR
H_SC_ERR  MOVEQ  #BAD_SCT,D0            bad set/clear/test
	  BRA.S  ESC_ERR
H_NOTACTL MOVEQ  #NO_ACTL,D0            not active controller
	  BRA.S  ESC_ERR
H_NOTSCTL MOVEQ  #NO_SCTL,D0            not system controller
	  BRA.S  ESC_ERR
HTERR_B   MOVEQ  #TFR_ERR,D0            bad transfer specification
	  BRA.S  ESC_ERR
HTERR_D   MOVEQ  #NO_DMA,D0             DMA not installed
	  BRA.S  ESC_ERR
H_NOWORD  MOVEQ  #NO_WORD,D0            WORD transfers not allowed
	  BRA.S  ESC_ERR
H_LSTERR  MOVEQ  #NOT_LSTN,D0           not addressed as listener
	  BRA.S  ESC_ERR
H_TLKERR  MOVEQ  #NOT_TALK,D0           not addressed as talker
	  BRA.S  ESC_ERR
H_TMO     MOVEQ  #TMO_ERR,D0            timeout
*         BRA.S  ESC_ERR
	  SPC    4
ESC_ERR   EXT.L  D0
	  MOVE.L D0,IOE_RSLT(A5)          save error in io space
	  MOVE.B IO_SC(A2),D0           \ get sc for error
	  MOVE.L D0,IOE_SC(A5)          /
	  MOVE.W #IOE_ERROR,ESC_CODE(A5)  save system esc code
	  TRAP   #10                      escape
	  PAGE
********************************************************************************
*
*       HP-IB WAIT ROUTINES
*
*
*         ENTRY:  H_WAIT_BO      WAIT FOR BO STATUS TO BE TRUE
*                 H_WAIT_BI      WAIT FOR BI STATUS TO BE TRUE
*
*         EXIT:   IF CONDITION IS OR COMES TRUE, RTS.
*                 THE ERROR ESCAPE IS GENERATED
*                   IF TIMEOUT > 0  AND <TIMEOUT> MS HAS EXPIRED, OR
*
*         NOTE:   DURING THE FIRST 1-2 MS OF THE WAIT, A QUICK CHECK ALGORITHM IS
*                 USED WHICH DOES NOT CHECK THE TIMEOUT - THUS IF
*                 THE DATA RATE IS > 1 KB, NO TIMEOUT DETECTION OVERHEAD OCCURS.
*
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
H_WAIT_BO MOVE.L #254,D2                D2 = QUICK CHECK LOOP COUNTER
*
*  Quick check counter was 127, changed to 254    tttt  JS 8/1/83
*  ALSO CHANGED MOVEQ TO MOVE.L
*
H_WBO_1   MOVE.B H_INT0STAT(A1),D1      GET THE INTERRUPT STATUS
	  CMP    #$3F,D1                IF IN READING THE STATUS WE MISSED AN
	  BLS.S  H_WBO_2                AN INTERRUPT, THEN WE HAVE TO
	   BSR   H_FAKEISR              FAKE AISR CALL...DUMB HARDWARE!
	   MOVEQ #0,D1
H_WBO_2   OR.B   H_INT0COPY(A2),D1      THIS IS IN CASE ISR LEFT STUFF HERE
	  BTST   #4,D1                  BYTE OUT?
	  BNE.S  H_W_DONE               IF SO, GET OUT!
	  DBRA   D2,H_WBO_1             ELSE LOOP BACK
	  SPC    1
	  MOVE.L TIMEOUT(A2),D2         OK, SET UP TO WATCH FOR TIMEOUT,ETC
	  BEQ.S  H_WBO_5                  if =0 goto inf loop
	  BTST   #TIMER_PRESENT,SYSFLAG2  CHECK IF TIMER THERE  tttt JS 8/1/83
	  BEQ.S  H_WBOT                   YES, USE IT           tttt JS 8/1/83
* tm      MULU   #60,D2                 60 TIMES THROUGH LOOP = 1 MS
	  LSL.L  #6,D2                  ( * 64 IS CLOSE ENOUGH )
H_WBO_3   BSR    H_GETSTAT              GO GET STATUS
	  BTST   #4,D1                  BYTE OUT?
	  BNE.S  H_WAIT_D1              YES, GET OUT OF HERE!
	  SUBQ.L #1,D2                  LOOP UNTIL GRACE PERIOD DONE
	  BNE    H_WBO_3
	  BRA.S  H_TMO_ERR              GIVE ERROR
	  SPC 1
H_WBO_5   BSR    H_GETSTAT              ELSE TRY AGAIN FOR STATUS
	  BTST   #4,D1
	  BEQ    H_WBO_5                IF NOT SET, KEEP WAITING
	  SPC 1
H_W_DONE  OR.B   D1,H_INT0COPY(A2)      SAVE ANY STATUS BITS WE DIDN'T USE
H_WAIT_D1 ANDI.B #$CF,H_INT0COPY(A2)    CLEAR BO/BI BITS
	  BTST   #5,D1                  DID WE GET A BYTE IN?
	  BEQ.S  H_WAIT_D2              IF NOT, SKIP
	  BSET   #7,H_FLAGS(A2)         ELSE SET HOLDOFF FLAG
H_WAIT_D2 RTS                           DONE!
	  SPC 4
H_TMO_ERR OR.B   D1,H_INT0COPY(A2)      SAVE ANY STATUS BITS NOT USED.
	  BRA    H_TMO
H_WBOT    MOVE.B #1,-(SP)               SETUP TIMER RECORD   tttt JS 8/1/83
	  MOVE.L D2,-(SP)                                    tttt JS 8/1/83
H_WBOT1   BSR    H_GETSTAT              CHECK FOR BYTE OUT   tttt JS 8/1/83
	  BTST   #4,D1                  BO SET?              tttt JS 8/1/83
	  BNE.S  H_WBOT2                YES, GET OUT OF HERE tttt JS 8/1/83
	  PEA    (SP)                   ELSE CHECK TIMER     tttt JS 8/1/83
	  JSR    CHECK_TIMER                                 tttt JS 8/1/83
	  BPL    H_WBOT1                BR IF NOT TIMED OUT  tttt JS 8/1/83
	  ADDQ   #6,SP                  TIMEOUT, GIVE ONE    tttt JS 5/2/84
	  MOVEQ  #60,D2                 MORE CHANCE WITH     tttt JS 5/2/84
	  BRA    H_WBO_3                SHORT TIMEOUT        tttt JS 5/2/84
H_WBOT2   ADDQ   #6,SP                  CLEAN UP STACK       tttt JS 8/1/83
	  BRA    H_WAIT_D1              AND RETURN           tttt JS 8/1/83
	  SPC 4
H_WAIT_BI MOVE.L  #254,D2                D2 = QUICK CHECK LOOP COUNTER
*
* Quick timeout count was 127, changed to get 1 MS on 16 MHz processor
*    tttt  JS 8/1/83  ALSO CHANGED MOVEQ TO MOVE.L
*
H_WBI_1   MOVE.B H_INT0STAT(A1),D1      GET THE INTERRUPT STATUS
	  CMP    #$3F,D1                IF IN READING THE STATUS WE MISSED AN
	  BLS.S  H_WBI_2                AN INTERRUPT, THEN WE HAVE TO
	   BSR   H_FAKEISR              FAKE AISR CALL...DUMB HARDWARE!
	   MOVEQ #0,D1
H_WBI_2   OR.B   H_INT0COPY(A2),D1      THIS IS IN CASE ISR LEFT STUFF HERE
	  BTST   #5,D1                  BYTE IN?
	  BNE.S  H_W_DONE               IF SO, GET OUT!
	  DBRA   D2,H_WBI_1             ELSE LOOP BACK
	  SPC 1
	  MOVE.L TIMEOUT(A2),D2         OK, SET UP TO WATCH FOR TIMEOUT,ETC
	  BEQ.S  H_WBI_5                  if =0 goto inf loop
	  BTST   #TIMER_PRESENT,SYSFLAG2  CHECK FOR TIMER      tttt JS 8/1/83
	  BEQ.S  H_WBIT                   IF THERE USE IT      tttt JS 8/1/83
* tm      MULU   #60,D2                 60 TIMES THROUGH LOOP = 1 MS
	  LSL.L  #6,D2                  ( * 64 IS CLOSE ENOUGH )
H_WBI_3   BSR    H_GETSTAT              GO GET STATUS
	  BTST   #5,D1                  BYTE IN?
	  BNE.S  H_WAIT_D1              YES, GET OUT OF HERE!
	  SUBQ.L #1,D2                  LOOP UNTIL GRACE PERIOD DONE
	  BNE    H_WBI_3
	  BRA.S  H_TMO_ERR              IF SO, GIVE ERROR
	  SPC 1
H_WBI_5   BSR    H_GETSTAT              ELSE TRY AGAIN FOR STATUS
	  BTST   #5,D1
	  BNE    H_WAIT_D1              IF SET, GET OUT!
	  BRA    H_WBI_5
H_WBIT    MOVE.B #1,-(SP)               SET UP TIMER RECORD     tttt JS 8/1/83
	  MOVE.L D2,-(SP)                                       tttt JS 8/1/83
H_WBIT1   BSR    H_GETSTAT              GET STATUS              tttt JS 8/1/83
	  BTST   #5,D1                  CHECK FOR BI SET        tttt JS 8/1/83
	  BNE.S  H_WBIT2                IF GOTIT THEN EXIT      tttt JS 8/1/83
	  PEA    (SP)                   ELSE CHECK TIMER        tttt JS 8/1/83
	  JSR    CHECK_TIMER                                    tttt JS 8/1/83
	  BPL    H_WBIT1                BR IF NOT TIMED OUT     tttt JS 8/1/83
	  ADDQ   #6,SP                  TIMEOUT, GIVE ONE MORE  tttt JS 5/2/84
	  MOVEQ  #60,D2                 CHANCE WITH SHORT       tttt JS 5/2/84
	  BRA    H_WBI_3                TIMEOUT COUNT           tttt JS 5/2/84
H_WBIT2   ADDQ   #6,SP                  CLEAN UP TIMER RECORD   tttt JS 8/1/83
	  BRA    H_WAIT_D1              AND GET OUT             tttt JS 8/1/83
	  PAGE
********************************************************************************
*
*       H_GETSTAT
*
*         SUBROUTINE TO GET INT0STAT AND INSURE WE DON'T MISS AN
*             INTERRUPT
*
*         HPL ROUTINE
*
********************************************************************************
H_GETSTAT MOVE.B H_INT0STAT(A1),D1       GET CURRENT INTERRUPT STATUS
	  CMP.B  #$3F,D1                 DID WE MISS AN INTERRUPT?
	  BLS.S  H_G_STAT1               IF NOT, THEN DONE
	  BSR.S  H_FAKEISR               ELSE FAKE AN ISR CALL
	  MOVEQ  #0,D1                   AND JUST USE THE COPY
H_G_STAT1 OR.B   H_INT0COPY(A2),D1       INCLUDE ANY SAVED BITS
	  OR.B   D1,H_INT0COPY(A2)
	  RTS
	  SPC 3
********************************************************************************
*
*       H_FAKEISR
*
*         SUBROUTINE TO FAKE AN ISR IN CASE AN INPUT FROM INT0STAT
*             CAUSED HARDWARE TO MISS AN INTERRUPT.
*
*         ENTRY:  D1.B = INT0STAT(A1) WHICH CAUSED INTERRUPT
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
H_FAKEISR TRAP  #11                     GET INTO SUPERVISOR MODE        scs
* scs     MOVE    SR,-(SP)              PUT SR ON STACK FOR ISR'S RTE
	  MOVEM.L D0-D7/A0-A6,-(SP)     SAVE REGISTERS
	  OR.B    D1,H_INT0COPY(A2)     PUT BYTE WHERE ISR WILL SEE IT
	  BSR     SET_INT_LEVEL         DISABLE CARD INTRS      wuwu TM 1/19/83
	  JSR     H_ISR                 CALL ISR
	  MOVEM.L (SP)+,D0-D7/A0-A6     RESTORE REGISTERS
	  MOVE  (SP)+,SR                RESTORE USER MODE               scs
	  RTS                                                           scs
* scs     RTE                           Re-enable interrupts and get SR off stack
	  PAGE
********************************************************************************
*
*       H_RDS
*
*         READ STATUS
*
*         PASCAL ROUTINE
*
********************************************************************************
H_ROUTINE EQU    2
H_TEMP    EQU    1
H_CRDREG  EQU    0
*
*
H_RDS     LEA    H_RDSTBL,A0            get pointer to lookup table
	  ADD.W  D1,D1                  multiply the rds register by 2
	  CMP.B  #H_RT_SIZ,D1           \ check for out of bounds
	  BGE.S  RDS_ERR                /
	  MOVE.W 0(A0,D1),D0            get the table entry
	  BMI.S  RDS_ERR                if the entry is 0 then error
	  CMP.B  #H_TEMP,D0
	  BEQ.S  HR_TEMP
	  BLT.S  HR_CARD
	  LSR    #8,D0                  get the routine offset
	  BEQ.S  H_RDS_ID               -  status rtn 0 - card id
	  SUBQ   #1,D0
	  BEQ.S  H_RDS_CS               -  status 3 - ctrl status + address
	  SUBQ   #1,D0
	  BEQ.S  H_RDS_ST               -  status 6 - chip state
	  SUBQ   #1,D0
	  BEQ.S  H_RDS_LI               -  status 7 - bus lines
*         BRA.S  RDS_ERR                there are no more status 'routines'
	  SPC    2
RDS_ERR   MOVEQ  #BAD_RDS,D0            bad read status
	  BRA    ESC_ERR
	  SPC    2
*
*         retrieve temps as words
*
HR_TEMP   LSR    #8,D0                  get temp offset
	  MOVE.W 0(A2,D0),D0            get the value
	  RTS
	  SPC 3
*
*         retrieve card registers as bytes
*
HR_CARD   LSR    #8,D0                  get the card offset
HR_CARD1  MOVE.B 0(A1,D0),D0            get the value
	  ANDI.W #$00FF,D0              mask off garbage
	  RTS
	  SPC 3
*
*         card id
*
H_RDS_ID  MOVE.W #1,D0
* tm      CMPA.L #H_INT_CA,A1           is this the internal card ?
* tm      BNE.S  HR_CARD1
	  RTS
	  SPC    2
H_RDS_CS  MOVE.B H_EXTSTAT(A1),D0       get sys ctl and active ctl
	  BCHG   #6,D0                  complement NOT actv ctl
	  ANDI.W #$C0,D0                mask bits
	  ADD.B  MA(A2),D0              get my address
	  RTS
	  SPC    2
H_RDS_ST  BSR    H_RDS_CS               get sys/act ctl and address info
	  MOVE.B H_ADRSSTAT(A1),D1      get chip state
	  LSL    #8,D1
	  ADD.W  D1,D0                  put together in D0
	  RTS
	  SPC    2
H_RDS_LI  MOVE.B H_BUSSTAT(A1),D0       get bus lines
	  LSL    #8,D0
	  MOVE.B H_DATAIN(A1),D0        get data lines
	  RTS
	  SPC    4
H_RDSTBL  EQU    *
	  DC.B   0,H_ROUTINE            status 0 - routine  0   - card id
	  DC.B   3,H_CRDREG             status 1 - card reg 3   - intr/dma status
	  DC.B   99,H_ROUTINE           status 2 - not implemented
	  DC.B   1,H_ROUTINE            status 3 - status&addr  - sys & act ctl my addr
	  DC.B   H_INT0COPY,H_TEMP      status 4 - temps
	  DC.B   H_INTMSKSAV,H_TEMP     status 5 - temps
	  DC.B   2,H_ROUTINE            status 6 - card reg 21+ - state
	  DC.B   3,H_ROUTINE            status 7 - card reg 23  - bus state
	  DC.B   H_CMDPASS,H_CRDREG     status 8 - card reg     - command
H_RT_END  EQU    *
H_RT_SIZ  EQU    H_RT_END-H_RDSTBL      size of table
	  PAGE
********************************************************************************
*
*       H_WTC
*
*         WRITE CONTROL
*
*         ENTRY:  D0.W = PARAMETER
*
********************************************************************************
H_WTC     CMPI.W #6,D1                  \ check for ctl limits
	  BGE.S  RDS_ERR                /
	  EXT.L  D1
	  ADD.L  D1,D1
	  JMP    HWTCTBL(D1)
	  SPC    3
HWTCTBL   BRA.S  H_WTC_RST              CONTROL 0 - DO A RESET
	  BRA.S  H_RQS                  CONTROL 1 - set SRQ response
	  BRA.S  H_WTC_PPC              CONTROL 2 : ppoll configure
	  BRA.S  H_WTC_SMA              CONTROL 3 - set my addr
	  BRA.S  RDS_ERR                CONTROL 4 : not used
	  BRA.S  H_EIR                  CONTROL 5 : enable intrpts
	  SPC    5
********************************************************************************
*
*       HPL_WTC
*
*         WRITE CONTROL TO HP-IB ( alter my addr or set ppoll conf. )
*
*         ENTRY:  D0.W = PARAMETER
*
*         NOTE:   This command was illegal on a 9825.  On WILDFIRE, it is used
*                 to alter the HP-IB address of a given card and/or reset the
*                 card without generating IFC or locally configure the
*                 parallel poll response:
*
*                 wtc 7,20    will change address to 20 and reset card
*                 wtc 7,31    will reset the card without changing addr
*                 wtc 7,<configure byte>  will do PP configure.
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
HPL_WTC   CMP    #31,D0                 MAKE SURE PARM IS 0..31
	  BHI.S  HPL_WTC3               IF NOT, GO TO PPOLL CONFIGURE
HPL_WTC0  BNE.S  HPL_WTC1               IF PARM <31, THEN SKIP
	  SPC    2
H_WTC_RST EQU    *
	  MOVE.B MA(A2),D0              ELSE USE PREVIOUS ADDRESS
	  SPC    2
H_WTC_SMA EQU    *
HPL_WTC1  MOVE.B H_EXTSTAT(A1),-(SP)    SAVE CONTROLLER ACTIVE STATE.
	  BSR    H_INIT_S               DO SOFTWARE RESET
	  BTST   #6,(SP)+               WERE WE CONTROLLER?
	  BNE.S  HPL_WTC2               IF NOT, SKIP
	  MOVE.B #H_RQC,(A0)            ELSE REGAIN CONTROL
	  MOVE.B #H_GTS,(A0)            AND RE-DROP ATN
HPL_WTC2  RTS                           ELSE DONE
	  SPC    3
HPL_WTC3  MOVEQ  #0,D1                  COMPUTE THE TWO BYTE PPOLLMSK
	  BSET   D0,D1                  BASED ON CONFIGURATION IN D0.
	  MOVE.W D1,H_PPOLLMSK(A2)      SAVE THE MASK
	  BSR    HPL_WTC4               set response in 9914  ( SPR695 TM 4/21/82 )
	  RTS                                                 ( SPR695 TM 4/21/82 )
	  SPC    3
H_WTC_PPC EQU    *
	  MOVE.B D0,D1                  copy so HPL_WTC4 works( 564    TM 10/6/82 )
	  LSL.W  #8,D1                  \ duplicate in left   ( 564    TM 10/6/82 )
	  OR.B   D0,D1                  /  byte for rsv stuff ( 564    TM 10/6/82 )
	  CLR.W  H_PPOLLMSK(A2)         clear the mask        ( SPR695 TM 4/21/82 )
	  MOVE.W D1,H_PPOLLMSK(A2)      move new mask in temps( SPR695 TM 4/21/82 )
	  BSR    HPL_WTC4               set response in 9914  ( SPR695 TM 4/21/82 )
	  RTS
	  SPC    3
********************************************************************************
*
*       H_RQS
*
*         request service - set spoll response ( & SRQ )
*
*         NOTE : rsv is the Request SerVice bit.
*                On the 9825 this is tied to the
*                ist state ( individual status ).
*                In the IEEE 488 standard the rsv state is
*                the SRQ response and ist is the  PPOLL
*                response.  The standard does not
*                specify any relation between the
*                two.
*
*         PASCAL ROUTINE ( taken from HPL R7OUT )
*
********************************************************************************
H_RQS     BCLR   #6,H_FLAGS(A2)         ASSUME rsv = 0 IN THIS NEW BYTE
	  MOVE.B D0,D1                  IF rsv BIT IN THE NEW BYTE IS INDEED
	  BCLR   #6,D1                  ZERO, THEN JUST OUTPUT THE NEW BYTE.
	  BEQ.S  H_RQS2
	  MOVE.B D1,H_SPOLL(A1)         ELSE FIRST WRITE THE BYTE WITH rsv
	  BSET   #6,H_FLAGS(A2)         CLEAR. REMEMBER THAT rsv IS SET.
H_RQS2    MOVE.B D0,H_SPOLL(A1)         WRITE THE BYTE WITH rsv CORRECT.
	  MOVE.W H_PPOLLMSK(A2),D1      GO UPDATE THE PARALLEL POLL RESPONSE
HPL_WTC4  TRAP  #11                                                     scs
* scs     MOVE   SR,-(SP)               DISABLE ISR'S WHILE WE FIGURE
	  ORI    #$2700,SR              OUT WHICH MASK TO SET BASED ON
	  BTST   #6,H_FLAGS(A2)         CURRENT rsv BIT.
	  BEQ.S  HPL_WTC5               IF rsv = 0, USE RIGHT BYTE
	  ROR   #8,D1                  ELSE USE LEFT BYTE
HPL_WTC5  MOVE.B D1,H_PPOLL(A1)
	  MOVE  (SP)+,SR                                                scs
	  RTS                                                           scs
* scs     RTE                           RE-ENABLE ISR'S AND RETURN
	  PAGE
********************************************************************************
*
*       H_EIR
*
*         ENABLE THE HP-IB BASED ON 98034 ENABLE BYTE
*
*         ENTRY:  D0.B = EIR BYTE A LA 98034 CARD
*
*         EXIT:   EIR BYTE SAVED IN DRIVER TEMPS.
*                 EIR ACCOMPLISHED.  ANY CONDITIONS ALREADY TRUE GENERATE LOGIN.
*
*         USES:   D0, D1, D2
*
*         HPL ROUTINE
*
********************************************************************************
H_EIR     MOVE.B D0,EIRB_OFF(A2)        SAVE EIR BYTE
	  MOVE.B #H_DAI1,H_AUXCMD(A1)   DISABLE ALL INTS FOR A SEC
* tm      MOVE.B #$80,3(A1)             ENABLE THE CARD       ( hphp TM 1/19/83 )
	  MOVE.W #$CEAB,D1              D1 = INITIAL VALUE OF INTMSK
	  MOVE.W D0,D2                  EXTRACT IRF & ORE BITS FROM BYTE
	  AND    #$C,D2
	  LSL    #8,D2                  MOVE THESE BITS TO BI/BO POSITION
	  LSL    #2,D2
	  OR     D2,D1                  AND INCLUDE IN THE ENABLE MASK
	  MOVE.W D0,D2                  SAVE EIR BYTE IN D2 WHILE LOOKING FOR
	  AND    #$30,D0                EITHER TLK OR LST BITS ON?
	  BEQ.S  H_EIR2                 IF NOT, SKIP
	    ADD  #4,D1                  ELSE ENABLE MA TO INTERRUPT
H_EIR2    MOVE.W D1,H_INTMSKSAV(A2)     SAVE THIS MASK VALUE
	  MOVEP  D1,H_INT0MASK(A1)      GIVE MASK TO 9914
	  MOVE.B H_FLAGS(A2),D0         GENERATE IMMEDIATE INTERRUPT IF ANY
	  AND    #$3C,D0                OF THE 'OTHER' CONDITIONS ARE TRUE
	   BEQ.S H_EIR3
	   JSR   LOGINT
H_EIR3    BSR    H_CHKADDR              GENERATE ANY ADDRESS INTERRUPTS.
	  BSR    H_CHKSRQ               GENERATE SRQ INTERRUPT IF NECESSARY
	  MOVE.B H_INT0COPY(A2),D1      IF BI/BO IS ENABLED AND THE
	  AND.B  H_INTMSKSAV(A2),D1     BO/BI STATUS IS ALREADY TRUE,
	  AND.B  #$30,D1                THEN WE HAVE TO FAKE AN
	  BEQ.S  H_EIR4                 INTERRUPT.
	    BSR  H_FAKEISR
H_EIR4    MOVE.B #H_DAI0,H_AUXCMD(A1)   RENABLE ALL INTS FOR CARD
	  BCLR    #1,H_FLAGS(A2)        if isr pend then do it ( rrrr TM 12/17/82 )
	  BEQ.S   H_EIR5                   else just exit      ( rrrr TM 12/17/82 )
	  JSR     LOGINT                                       ( rrrr TM 12/17/82 )
H_EIR5    RTS                                                  ( rrrr TM 12/17/82 )
	  PAGE
********************************************************************************
*
*       H_ENABLE
*
*         ENABLE THE HP-IB FOR TRANSFER USES
*
*         ENTRY:  D0.W = 9914 ENABLE MASK ( TO BE INCLUSIVE OR'ED )
*                 ( D0 = #$2000  FOR BYTE IN  ( BI )
*                 ( D0 = #$1000  FOR BYTE OUT ( BO )
*
*         USES:   D0, D1
*
*         PASCAL ROUTINE        1/19/83
*
********************************************************************************
H_ENABLE  EQU   *
	  MOVE.B  #H_DAI1,H_AUXCMD(A1)  DISABLE THE CARD    ( hphp TM 1/19/83 )
	  OR.W    H_INTMSKSAV(A2),D0    OR NEW BITS IN      ( hphp TM 1/19/83 )
H_ED_COM  MOVE.W  D0,H_INTMSKSAV(A2)    AND RE-SAVE         ( hphp TM 1/19/83 )
	  MOVEP   D0,H_INT0MASK(A1)     AND GIVE TO CARD    ( hphp TM 1/19/83 )
	  MOVE.B  H_INT0COPY(A2),D1     IF BI/BO ENABLED &  ( hphp TM 1/19/83 )
	  AND.B   H_INTMSKSAV(A2),D1       IS ALREADY TRUE, ( hphp TM 1/19/83 )
	  AND.B   #$30,D1               THEN FAKE AN        ( hphp TM 1/19/83 )
	  BEQ.S   H_ED_EXIT             INTERRUPT.          ( hphp TM 1/19/83 )
	  BSR     H_FAKEISR                                 ( hphp TM 1/19/83 )
H_ED_EXIT MOVE.B  #H_DAI0,H_AUXCMD(A1)   RENABLE CARD       ( hphp TM 1/19/83 )
	  RTS                                               ( hphp TM 1/19/83 )
********************************************************************************
*
*       H_DISABLE
*
*         DISABLES BO AND BI ON THE HP-IB FOR TRANSFER USES
*
*         USES:   D0, D1
*
*         PASCAL ROUTINE        1/19/83
*
********************************************************************************
H_DISABLE EQU   *
	  MOVE.B  #H_DAI1,H_AUXCMD(A1)  DISABLE THE CARD    ( hphp TM 1/19/83 )
	  MOVE.W  H_INTMSKSAV(A2),D0    GET OLD MASK        ( hphp TM 1/19/83 )
	  ANDI.W  #$CFFF,D0             MASK OUT BO/BI      ( hphp TM 1/25/83 )
	  BRA.S   H_ED_COM              JUMP TO COMMON CODE ( hphp TM 1/19/83 )
	  PAGE
********************************************************************************
*
*       H_P_POLL
*
*         CONDUCT PARALLEL POLL
*
*         IF NOT ACTIVE CONTROLLER GIVE ERROR
*         ELSE VALUE RETURNED IN D0.B
*
*         HPL ROUTINE
*
********************************************************************************
H_P_POLL  BSR    H_SET_ATN              SET ATN LINE
	  BSR    H_WAIT_BO              WAIT FOR 'READY'
	  ORI.B  #16,H_INT0COPY(A2)     (SAVE BO STATUS FOR LATER)
	  MOVE.B #H_RPP1,H_AUXCMD(A1)   REQUEST THE PARALLEL POLL
*   JS    MOVEQ  #20,D0                 DELAY 40 US FOR LINES TO SETTLE
*   JS    DBRA   D0,*
	  MOVE.L #40,-(SP)              USE TIMER FOR DELAY   tttt JS 8/1/83
	  JSR    DELAY_TIMER                                  tttt JS 8/1/83
	  MOVEQ  #0,D0
	  MOVE.B H_CMDPASS(A1),D0       GET THE RESPONSE
	  MOVE.B #H_RPP0,H_AUXCMD(A1)   CLEAR PARALLEL POLL
	  MOVE.B #H_GTS,H_AUXCMD(A1)    CLEAR ATN
	  RTS
	  PAGE
********************************************************************************
*
*       H_SET
*
*         Set an HPIB line true
*
*         PASCAL ROUTINE
*
********************************************************************************
H_SET     CMP    #7,D1                  \
	  BHI    H_SC_ERR               /  make sure bit # is  <=7
	  ADD    D1,D1
	  LEA    H_S_TBL,A0             \
	  ADDA.W 0(A0,D1),A0             INDEXED JUMP THRU TABLE
	  JMP    (A0)                   /
*                             move h_s_tbl(d1),d1
*                             jmp  h_s_tbl(d1)
	  SPC    3
H_S_TBL   EQU    *
	  DC.W   H_REN-H_S_TBL          REN  - set REN
	  DC.W   H_IFC-H_S_TBL          IFC  - pulse IFC ( set REN/clr ATN )
	  DC.W   H_SC_ERR-H_S_TBL       SRQ  - error
	  DC.W   H_EOI-H_S_TBL          EOI  - pulse EOI on next byte out
	  DC.W   H_SC_ERR-H_S_TBL       NRFD - error
	  DC.W   H_SC_ERR-H_S_TBL       NDAC - error
	  DC.W   H_SC_ERR-H_S_TBL       DAV  - error
	  DC.W   H_SET_ATN-H_S_TBL      ATN  - set ATN true
	  SPC    3
********************************************************************************
*
*       H_REN
*
*         SET REN ON HP-IB
*
*         EXIT :   IF NOT SYSTEM CONTROLLER THEN GIVE ERROR
*
*         HPL ROUTINE
*
********************************************************************************
H_REN     BTST   #7,H_EXTSTAT(A1)
	  BEQ    H_NOTSCTL
	  BRA.S  H_IFC2
	  SPC 3
********************************************************************************
*
*       H_IFC
*
*         DRIVE IFC TRUE FOR 100 MICROSECONDS
*
*         ENTRY :   IF NOT SYSTEM CONTROLLER, CLEAR STS AND SET ERR
*
*         EXIT  :   ATN CLEARED
*                   REN SET
*
*         NOTE  :   IF THE 9914 IS NOT IN SOFTWARE RESET, THIS ROUTINE WILL
*                   DRIVE THE ATN LINE TRUE DURING THE IFC.
*
*         HPL ROUTINE
*
*
********************************************************************************
H_IFC     BTST   #7,H_EXTSTAT(A1)       MUST BE SYSTEM CONTROLLER
	  BEQ    H_NOTSCTL
	  MOVE.B #H_SIC1,H_AUXCMD(A1)   SET IFC
*   JS    MOVEQ  #70,D0                 SET DELAY COUNT
*   JS    DBRA   D0,*
	  MOVE.L #100,-(SP)             USE TIMER FOR DELAY  tttt JS 8/1/83
	  JSR    DELAY_TIMER                                 tttt JS 8/1/83
	  MOVE.B #H_SIC0,H_AUXCMD(A1)   CLEAR IFC
	  MOVE.B #H_GTS,H_AUXCMD(A1)    CLEAR ATN
H_IFC2    MOVE.B #H_SRE1,H_AUXCMD(A1)   SET REN
	  RTS
	  SPC    3
********************************************************************************
*
*       H_SET_ATN
*
*         ROUTINE TO SET ATN.
*
*         EXIT:   IF NOT CONTROLLER THEN GIVE ERROR
*                    ELSE IF ADDRESSED TO LISTEN AND HOLDOFF FLAG IS SET
*                    THEN DO TCS
*                 ELSE IF ADDRESSED TO TALK,
*                    THEN WAIT FOR BO STATUS AND DO TCA
*                 ELSE DO TCA
*
*         USES:   H_WAIT ROUTINE
*
*         HPL ROUTINE ( H_SET_ATN used to be H_ATN1 )
*                     ( H_SET_ATN was identical to H_ATN1
*                       except for error exits )
*
********************************************************************************
H_SET_ATN BTST   #6,H_EXTSTAT(A1)       BETTER BE CONTROLLER
	  BNE    H_NOTACTL              ELSE ERROR
H_ATN1A   MOVE.B H_ADRSSTAT(A1),D1      GET ADDRESSED STATUS
	  MOVEQ  #H_TCS,D2              ASSUME WE CAN DO TCS
	  BTST   #2,D1                  ARE WE A LISTENER?
	  BEQ.S  H_ATN1_0               IF NOT, SKIP
	  BTST   #7,H_FLAGS(A2)         TEST HOLDOFF FLAG
	  BNE.S  H_ATN1_3               IF IT WAS SET, USE THE TCS
	  BRA.S  H_ATN1_2               ELSE DO TCA
H_ATN1_0  BTST   #1,D1                  ARE WE A TALKER?
	  BEQ.S  H_ATN1_2               IF NOT, TAKE CONTROL ASYNC
H_ATN1_1  BSR    H_WAIT_BO              ELSE WAIT FOR BYTE OUT
	  ORI.B  #16,H_INT0COPY(A2)     (SAVE BO STATUS FOR LATER!)
H_ATN1_2  MOVEQ  #H_TCA,D2              DO TAKE CONTROL ASYNC
H_ATN1_3  MOVE.B D2,H_AUXCMD(A1)        TAKE CONTROL!
	  RTS
	  SPC    3
********************************************************************************
*
*       H_EOI
*
*         ROUTINE TO SET EOI ON THE NEXT BYTE OUT
*
*         test to see if 9914 waits -
*               if so - ok
*               if not- do wait ( HW... )
*
********************************************************************************
H_EOI     MOVE.B #H_FEOI,H_AUXCMD(A1)   SET EIO WITH NEXT BYTE
H_DMYRTS  RTS
	  PAGE
********************************************************************************
*
*       H_CLR
*
*         Set an HPIB line false
*
*         PASCAL ROUTINE
*
********************************************************************************
H_CLR     CMP    #7,D1                  \
	  BHI    H_SC_ERR               /  make sure bit # is  <=7
	  ADD.W  D1,D1
	  LEA    H_C_TBL,A0             \
	  ADDA.W 0(A0,D1),A0             INDEXED JUMP THRU TABLE
	  JMP    (A0)                   /
	  SPC    3

H_C_TBL   EQU    *
	  DC.W   H_LOCAL-H_C_TBL        REN  - clear REN
	  DC.W   H_DMYRTS-H_C_TBL       IFC  - nothing
	  DC.W   H_SC_ERR-H_C_TBL       SRQ  - error
	  DC.W   H_DMYRTS-H_C_TBL       EOI  - nothing
	  DC.W   H_SC_ERR-H_C_TBL       NRFD - error
	  DC.W   H_SC_ERR-H_C_TBL       NDAC - error
	  DC.W   H_SC_ERR-H_C_TBL       DAV  - error
	  DC.W   H_CLR_ATN-H_C_TBL      ATN  - clear ATN
	  SPC 3
********************************************************************************
*
*       H_LOCAL
*
*         CLEAR REN ON HP-IB
*
*         EXIT :   IF NOT SYSTEM CONTROLLER THEN GIVE ERROR
*
*         PASCAL ROUTINE
*
********************************************************************************
H_LOCAL   BTST   #7,H_EXTSTAT(A1)
	  BEQ    H_NOTSCTL
	  MOVE.B #H_SRE0,H_AUXCMD(A1)   CLEAR REN
	  RTS
	  SPC 3
********************************************************************************
*
*       H_CLR_ATN
*
*         CLEAR ATN ON HP-IB
*
*         EXIT :   IF NOT ACTIVE CONTROLLER THEN GIVE ERROR
*
*         PASCAL ROUTINE
*
********************************************************************************
H_CLR_ATN BTST   #6,H_EXTSTAT(A1)
	  BNE    H_NOTACTL
	  MOVE.B #H_GTS,H_AUXCMD(A1)    CLEAR ATN
	  RTS
	  SPC 3
	  PAGE
********************************************************************************
*
*       H_TEST
*
*         Get an HPIB line's state
*
*         ENTRY :       D1 = line parameter
*                            0 = REN
*                            1 = IFC
*                            2 = SRQ
*                            3 = EOI
*                            4 = NRFD
*                            5 = NDAC
*                            6 = DAV
*                            7 = ATN
*
*         PASCAL ROUTINE
*
********************************************************************************
H_TEST    MOVEQ #1,D0                   assume line is true
	  BTST   D1,H_BUSSTAT(A1)       test bus lines from 9914
	  BNE.S  H_TEST_EX              if line is set then return
	  CLR.W  D0                     else set false return
H_TEST_EX RTS
	  PAGE
********************************************************************************
*
*       H_R6OUT
*
*         EMULATION OF R6 OUT FOR HP-IB
*
*         ENTRY:  D0 = BYTE TO OUTPUT
*
*         EXIT:   IF NOT ACTIVE CONTROLLER, STS CLEARED AND ERROR BIT SET
*                 ELSE OPERATION IS DONE AND ANY ADDRESSING DECODED.
*
*         HPL ROUTINE ( MODIFIED )
*
*
********************************************************************************
H_R6OUT   JSR    WAIT_TFR               IF A TFR IS ACTIVE WAIT TILL IT ISN'T
	  BSR    H_SET_ATN              GO SET ATN OR GIVE STS ERROR
	  BSET   #0,H_FLAGS(A2)         SET PASS CONTROL FLAG
	  BSR    H_WTB1                 GO OUTPUT THE BYTE
	  AND    #$7F,D0                CLEAR MSB FOR COMPARISON
	  MOVE.B MA(A2),D2              GET MY ADDRESS
	  OR     #$20,D2                MAKE A LISTEN ADDRESS
* tm      MOVEQ  #H_LON1,D1             ASSUME LON COMMAND...
	  MOVE.B #H_LON1,D1
	  CMP.B  D2,D0                  MLA?
	  BEQ.S  H_R6OUT3               IF SO GO DO LON
	  EORI   #$60,D2                MAKE A TALK ADDRESS
* tm      MOVEQ  #H_TON1,D1             ASSUME TON COMMAND...
	  MOVE.B #H_TON1,D1
	  CMP.B  D2,D0                  MTA?
	  BEQ.S  H_R6OUT3               IF SO, GO DO TON
	  MOVEQ  #H_LON0,D1             ASSUME LON0 COMMAND
	  CMP.B  #UNL,D0                UNLISTEN?
	  BEQ.S  H_R6OUT3               IF SO, GO DO LON0
	  CMP.B  #TCT,D0                TAKE CONTROL?
	  BEQ.S  H_R6TCT                IF SO , SKIP to tct code
H_R6OUT2  AND    #$60,D0                OTHER TALK ADDRESS?
	  CMP.B  #$40,D0
	  BNE.S  H_R6OUT4               IF NOT, SKIP
	  MOVEQ  #H_TON0,D1             IF SO, SET UP FOR TON0
H_R6OUT3  MOVE.B D1,H_AUXCMD(A1)        IF SO, DO IT
H_R6OUT4  BCLR   #0,H_FLAGS(A2)         CLEAR PASS CONTROL FLAG
*
* Added for 68040 timing problem - delay just a little bit
* This timing value taken from another usage in this file
* Our test suite passes with a value of 5. I tried to get
* a spec value but I couldn't find one. This delay value
* may have to be increased in the future ... JWH 2/28/91
*

	  BTST   #3,SYSFLAG2      68040 only
	  BNE    just_leave       else same as before
	  MOVE.L #40,-(SP)        this time delay
	  JSR    DELAY_TIMER      worked with our test suite
just_leave  RTS                   JWH 2/28/91
	  SPC    3
H_R6TCT   BTST   #1,H_ADRSSTAT(A1)      ARE WE TALKER?
	  BNE.S  H_R6OUT4               IF SO, IGNORE TCT
	  BSR    H_WAIT_BO              IF NOT, THEN WAIT FOR BYTE OUT
	  MOVE.B #H_GTS,H_AUXCMD(A1)    AND drop atn
	  MOVE.B #H_RLC,H_AUXCMD(A1)    AND RELEASE CONTROL
HTCTLOOP  BTST   #6,H_EXTSTAT(A1)  (tm) \
	  BEQ    HTCTLOOP          (tm) / wait for non active ctl
	  RTS                      (tm) exit
	  PAGE
********************************************************************************
*
*       H_DMATERM
*
*         TERMINATION OF DMA TRANSFER
*
*         CALLED FROM DMA INTERRUPT SERVICE ROUTINE
*
*         DMA RESOURCE HAS ALREADY BEEN RELEASED
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
H_DMATERM BSR     SET_INT_LEVEL         DISABLE CARD INTRS      wuwu TM 1/19/83
*                                       this is okay - only called in ISR
	  JSR     DROPDMA               RELINQUISH DMA RESOURCE
	  MOVE.B  #$80,3(A1)            TURN OFF DMA ENABLE BITS( hphp TM 1/27/83 )
*                                       in the card.            ( hphp TM 1/27/83 )
	  JSR     ITXFR                 MAKE SURE THERE IS A TRANSFER ACTIVE
	  BEQ.S   HDMA_END              IF NOT, FORGET THE INTERRUPT
*                                       at this point
*                                       D4 has remaining count
*                                       D3 has intended
	  MOVE.L  D4,TCNT_OFF(A3)       update count
	  SUB.L   D4,D3                 put # bytes tfr'd into D3
	  TST.B   TDIR_OFF(A3)          WHAT DIRECTION OF TRANSFER?
	  BNE.S   H_DMATO               IF OUTPUT, SKIP
	  ADD.L   D3,TFIL_OFF(A3)       update fill pointer
	  MOVE.B  #H_HDFE0,H_AUXCMD(A1) ELSE CLEAR HOLD OFF ON END MODE
	  MOVE.B  #H_HDFA1,H_AUXCMD(A1) SET HOLD OFF ON ALL MODE
	  MOVE.W  #$2000,D0             PRESET ENABLE FOR BI    ( hphp TM 1/19/83 )
H_DMATI_1 MOVE.L  #1,TCNT_OFF(A3)       TRANSFER LAST BYTE UNDER INTERRUPT
	  BSR     H_ENABLE                                      ( hphp TM 1/19/83 )
	  BRA.S   HDMA_END
	  SPC     2
H_DMATO   ADD.L   D3,TEMP_OFF(A3)       update empty pointer
	  TST.B   TEND_OFF(A3)          IS EOI TAG SET?
	  BEQ.S   H_DMATO_1             IF NOT, TRANSFER IS DONE!
	  MOVE.W  #$1000,D0             SEND LAST BYTE BY INTR  ( hphp TM 1/19/83 )
	  BRA.S   H_DMATI_1
H_DMATO_1 JSR     STCLR                 CLEAR BUFFER BUSY BITS & LOG BRANCH
HDMA_END  RTS                           END OF SERVICE
	  TTL IOLIB EXTH - HPIB INTERRUPT SERVICE ROUTINE
	  PAGE
********************************************************************************
*
*       H_ISR
*
*         INTERRUPT SERVICE ROUTINE FOR HP-IB CARDS
*
*         ENTRY : A1,A2 are set up
*
*         The ISR will track down the buffer control block
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
H_ISR     EQU     *
	  BCLR    #1,H_FLAGS(A2)        clear user isr pending flag
	  MOVEP   H_INT0STAT(A1),D0     GET BOTH STATUS BYTES FROM 9914
	  BSR     H_ISR1                PROCESS THE INTERRUPTING CONDITION(S)
	  JSR     ITXFR                 GO SEE IF TRANSFER IS ACTIVE
	   BEQ.S  HISR_END              IF NOT, THEN WE ARE DONE.
	  CMP.B   #TT_BURST,D1          IF FRW IS ACTIVE, GO PROCESS IT
	  BEQ     H_FRW
	  CMP.B   #TT_INT,D1            IF INT THEN GO PROCESS IT
	  BEQ.S   H_BUF
	  CMP.B   #TT_DMA,D1            IF DMA
	  BEQ.S   H_ISRDMA
HISR_END  BCLR    #1,H_FLAGS(A2)        if isr pending then do it
	  BEQ.S   H_ISR_EX
	  JSR     LOGINT
H_ISR_EX  RTS                           otherwise return ( used for FAKEISR )
	  SPC 2
*
* DMA TRANSFER CLEANUP:
*
H_ISRDMA  CMPI.L  #1,D3                 IF COUNT IS = one  ,  THIS IS
	  BEQ.S   H_BUF                    THE EXTRA TFR BY INTERRUPT, SO SKIP
	  TST.B   TDIR_OFF(A3)          \
	  BNE.S   HISR_END              / IF OUTPUT, CAN'T BE EARLY TERM
	  TST.B   TEND_OFF(A3)          \
	  BEQ.S   HISR_END              / IF NO EOI TAG, CAN'T BE EARLY TERM
	  BTST    #11,D0                \
	  BEQ     HISR_END              / IF EOI NOT SET, CAN'T BE EARLY TERM
	  MOVE.B  #$80,3(A1)            ELSE IT IS EARLY DMA TERMINATION
	  MOVE.B  #H_HDFA1,H_AUXCMD(A1) SO DISABLE DMA, SET HOLD OFF ON
	  MOVE.B  #H_HDFE0,H_AUXCMD(A1) ALL, CLEAR HOLD OFF ON END.
	  BSET    #7,H_FLAGS(A2)        SET HOLDOFF INDICATOR
H_BYTTST  EQU     *                                             ( SPRxxx TM 6/14/82 )
	  BTST    #13-8,H_INT0COPY(A2)  test for byte in        ( SPRxxx TM 7/21/82 )
	  BEQ.S   H_NOBYTE                   if no byte - norm. ( SPRxxx TM 6/14/82 )
	  JSR     DROPDMA               free the dma channel    ( SPRxxx TM 6/14/82 )
*                                       D4 has remaining = 0    ( SPRxxx TM 6/14/82 )
*                                       D3 has intended         ( SPRxxx TM 6/14/82 )
	  MOVE.W  #$2000,D0             set bit #13 - byte in
	  ADD.L   D3,TFIL_OFF(A3)       update fill pointer     ( SPRxxx TM 6/14/82 )
	  MOVEA.L TFIL_OFF(A3),A0       get pointer to next     ( SPRxxx TM 6/14/82 )
*                                       byte in the buffer      ( SPRxxx TM 6/14/82 )
	  MOVEQ   #1,D3                 set count = 1           ( SPRxxx TM 6/14/82 )
	  BRA.S   H_BUFI                let intr tfr finish     ( SPRxxx TM 6/14/82 )
*
H_NOBYTE  JSR     DROPDMA               FREE THE DMA CHANNEL
*                                       D4 has remaining
*                                       D3 has intended
	  MOVE.L  D4,TCNT_OFF(A3)       put remaining into TCNT
	  SUB.L   D4,D3                 put # bytes tfr'd into D3
	  ADD.L   D3,TFIL_OFF(A3)       update the fill pointer based on actual
*                                              bytes tfr'd
	  JSR     STCLR                 MARK THE TFR DONE   AND LOG BRANCH
	  BRA     HISR_END              DONE!
	  SPC 2
*
* INTERRUPT TRANSFER PROCESSING:
*
H_BUF     TST.B   TDIR_OFF(A3)          WHICH DIRECTION TRANSFER?
	  BNE.S   H_BUFO                SKIP IF OUTPUT
	  SPC 2
*
* BUFFERED INPUT:
*
H_BUFI    BTST    #13,D0                IS BYTE IN SET?
	  BEQ     HISR_END                 IF NOT, DO NOTHING
	  MOVEQ   #0,D4                    ELSE GET THE BYTE
	  MOVE.B  H_DATAIN(A1),D4
	  BTST    #11,D0                IS EOI SET WITH THIS BYTE?
	  BNE.S   H_BUFI_0
	  BTST    #0,H_STAT3(A2)        is eor set
	  BEQ.S   H_BUFI_1                 IF NOT SKIP
H_BUFI_0  TST.B   TEND_OFF(A3)          SHOULD WE IGNORE EOI?
	  BEQ.S   H_BUFI_1              IF SO, SKIP
	  MOVE.W  D4,D2                    ELSE USE TRICK TO MAKE TFR QUIT.
*                                          - set term char to current char
H_BUFI_1  MOVE.B  D4,(A0)+              SAVE CHARACTER IN BUFFER
	  MOVE.L  A0,TFIL_OFF(A3)       AND SAVE NEW FILL PTR
	  SUBQ.L  #1,D3                 HAVE WE TRANSFERED ALL CHARS?
	  MOVE.L  D3,TCNT_OFF(A3)       SAVE TRANSFER COUNT...
	  BLE.S   H_TI_TERM                IF SO, SKIP
	  CMP.W   D4,D2                    ELSE TERMINATE ON CHARACTER?
	  BEQ.S   H_TI_TERM             IF SO, SKIP
	  MOVE.B  #H_RHDF,H_AUXCMD(A1)  RELEASE HOLDOFF FOR NEXT BYTE
	  BCLR    #0,H_STAT3(A2)        clear eor flag
H_BUF_NT  BRA     HISR_END              AND RETURN
	  SPC 2
*
* BUFFERED OUTPUT:
*
H_BUFO    BTST    #12,D0                IS BYTE OUT SET ?
	  BEQ     HISR_END              IF NOT, DO NOTHING.
	  SUBQ.L  #1,D3                 IS THIS THE LAST CHARACTER?
	  BNE.S   H_BUFO_1              IF NOT, SKIP
	  TST.B   TEND_OFF(A3)          SHOULD WE SET EOI?
	  BEQ.S   H_BUFO_1              IF NOT, SKIP
	   MOVE.B #H_FEOI,H_AUXCMD(A1)  ELSE SET EOI WITH THE LAST BYTE
H_BUFO_1  MOVE.B  (A0)+,H_DATAOUT(A1)   SEND THE BYTE
	  MOVE.L  A0,TEMP_OFF(A3)       AND SAVE NEW EMPTY PTR
	  MOVE.L  D3,TCNT_OFF(A3)       SAVE TRANSFER COUNT...
	  BGT.S   H_BUF_NT              NO...DON'T TERMINATE
	  BRA.S   H_TO_TERM             YES...TERMINATE THE TFR
	  SPC 2
*
* INT AND FRW TRANSFER TERMINATION
*
H_TI_TERM BSET    #7,H_FLAGS(A2)        SET HOLDOFF INDICATOR
H_TO_TERM EQU     *
* tm      MOVE.B  #0,D0                 DISABLE OTHER INTERRUPTS
* tm      BSR     H_EIR
	  BSR     H_DISABLE             DISABLE BO/BI INTRPTS   ( hphp TM 1/19/83 )
	  JSR     STCLR                 MARK THE BUFFER FINISHED
	  BRA     HISR_END              END OF ISR
	  PAGE
*
* FAST R/W TRANSFER PROCESSING:
*
H_FRW     ORI     #$2700,SR             DISABLE ALL OTHER INTS
*                                       the pascal system will re-enable&RTE
	  TST.B   TDIR_OFF(A3)          WHICH DIRECTION TRANSFER?
	  BNE.S   H_FRWO                SKIP IF OUTPUT
	  SPC 4
*
* FAST R/W INPUT:
*
H_FRI     MOVEQ   #0,D4                 PRESET UPPER BYTE TO 0
	  LSR     #8,D0                 REPOSITION REMAINING INT STAT BITS
	  BTST    #5,D0                 DO WE ALREADY HAVE BYTE IN?
	  BNE.S   H_FRWI_2A             IF SO, SKIP
H_FRWI_1  MOVE.B  H_INT0STAT(A1),D0     GET INTERRUPT STATUS
	  BEQ     H_FRWI_1              IF NOTHING, KEEP WAITING
	  BTST    #3,D0                 IS EOI SET?
	  BNE.S   H_FRWI_2              IF SO, GO PROCESS BI AND END
	  BTST    #5,D0                 IS BYTE IN SET?
	  BNE.S   H_FRWI_2A             IF SO, GO PROCESS IT
	  BSR.S   H_FRW_OTHER           ELSE PROCESS OTHER INTERRUPTS
	  BRA     H_FRWI_1              AND KEEP WAITING
H_FRWI_2  OR.B    H_INT0STAT(A1),D0     MAKE SURE WE GET THE BI BIT!
H_FRWI_2A MOVE.B  H_DATAIN(A1),D4       GET THE DATA BYTE
	  MOVE.B  D4,(A0)+              SAVE IT IN THE BUFFER
	  AND     #$5F,D0               CLEAR BI STAT AND CHECK FOR OTHERS
	  BEQ.S   H_FRWI_3              IF NO OTHER BITS SET, SKIP
	  BSR.S   H_FRW_OTHER           ELSE PROCESS THE OTHERS
	  BTST    #3+8,D0               WAS EOI SET?
	  BEQ.S   H_FRWI_3              IF NOT, SKIP
	  TST.B   TEND_OFF(A3)          SHOULD WE IGNORE EOI?
	  BEQ.S   H_FRWI_3              IF SO, SKIP
	   MOVE.W D4,D2                 ELSE USE TRICK TO MAKE TFR TERMINATE
	   BSET    #0,H_STAT3(A2)       SET EOR INDICATOR
H_FRWI_3  SUBQ.L  #1,D3                 DONE?
	  BLE     H_TBI_TRM             IF SO, GO QUIT
	  CMP.W   D4,D2                 DOES CHAR MATCH TERMINATION CHAR?
	  BEQ     H_TBI_TRM             IF SO, GO QUIT
	  MOVE.B  #H_RHDF,H_AUXCMD(A1)  ELSE ASK FOR ANOTHER BYTE
	  BRA     H_FRWI_1              AND GO WAIT FOR IT
	  SPC 2
H_FRW_OTHER MOVEM.L D1-D3,-(SP)           SAVE REGS FOR LATER
	  TAS     D0                    SET BIT 8 TO FORCE LOOK AT INT0STAT
	  BSR.S   H_ISR0                PROCESS OTHER INTERRUPTS
	  MOVEM.L (SP)+,D1-D3           RESTORE REGS FOR ANOTHER PASS
	  RTS
	  SPC 2
H_TBI_TRM MOVE.L  TCNT_OFF(A3),D4       get intended count
	  MOVE.L  D3,TCNT_OFF(A3)       D3 has bytes not finished
	  SUB.L   D3,D4                 D4 has bytes transfered
	  ADD.L   D4,TFIL_OFF(A3)       update fill pointer
	  BRA     H_TI_TERM             and finish
	  SPC 3
*
* FAST R/W OUTPUT:
*
H_FRWO    BTST    #12,D0                DO WE ALREADY HAVE BYTE OUT?
	  BNE.S   H_FRWO_2              IF SO, GET STARTED
H_FRWO_1  MOVE.B  H_INT0STAT(A1),D0     ELSE GET THE INTERRUPT STATUS
	  BEQ     H_FRWO_1              IF NOTHING, KEEP WATCHING
	  CMP.B   #$90,D0               IS IT BO?
	  BEQ.S   H_FRWO_2              IF SO, LETS GO!
	  BSR     H_FRW_OTHER           ELSE GO PROCESS OTHER INTERRUPTS
	  BTST    #12,D0                IS BO LEFT?
	  BEQ     H_FRWO_1              IF NOT, KEEP WATCHING
H_FRWO_2  CMP.L   #1,D3                 IS THIS THE LAST BYTE?
	  BNE.S   H_FRWO_3              IF NOT, SKIP
	  TST.B   TEND_OFF(A3)          SHOULD WE TAG WITH EOI?
	  BEQ.S   H_FRWO_3              IF NOT, SKIP
	   MOVE.B #H_FEOI,H_AUXCMD(A1)  ELSE TAG IT!
H_FRWO_3  MOVE.B  (A0)+,H_DATAOUT(A1)   OUTPUT A BYTE FROM THE BUFFER
	  SUBQ.L  #1,D3                 DONE?
	  BGT     H_FRWO_1              IF NOT, WATCH FOR BO AGAIN
	  MOVE.L  TCNT_OFF(A3),D3       \
	  ADD.L   D3,TEMP_OFF(A3)       /  update empty pointer
	  CLR.L   TCNT_OFF(A3)          clear the count
	  BRA     H_TO_TERM             ELSE WE ARE DONE!
	  PAGE
********************************************************************************
*
*       ISR0
*       ISR1
*
*         THE FOLLOWING ROUTINE DOES ALL THE GRUNT WORK FOR THE ISR. IT IS
*         SEPARATED OUT SO IT CAN BE CALLED FROM BACKGROUND.
*
*         ENTRY:  D0 CONTAINS BOTH 9914 STATUS BYTES.
*
*         THE FOLLOWING CONDITIONS, IF THEY ARE THE CAUSE OF THE INTERRUPT, WILL
*         BE PROCESSED:
*
*                 END:  SET EOR LATCH.
*                 SPAS: CLEAR rsv INDICATOR, CHANGE PPOLL RESPONSE.
*                 RLC:  IF ENABLED, LOG BRANCH. (ENHANCEMENT)
*                 GET:  SET LATCH. IF ENABLED, LOG EOL BRANCH.  (ENHANCEMENT)
*                 UCG:  IF TCT, THEN REQUEST 9914 BECOME CONTROLLER.
*                                    IF ENABLED, LOG EOL BRANCH.
*                       IF PPC, THEN TELL 9914 TO PASS THROUGH NEXT SECONDARY.
*                       IF PPD OR SECONDARY, DO PP CONFIGURING.
*                 DCAS: SET DCAS LATCH.
*                       ELSE IF ENABLED, LOG EOL BRANCH.
*                 MA:   IF T/L IS ENABLED AND TADS/LADS IS TRUE, LOG EOL BRANCH.
*                 SRQ:  LOG EOL BRANCH, DISABLE SRQ INTERRUPT.
*                 IFC:  SET IFC LATCH. IF ENABLED, LOG EOL BRANCH. (ENHANCEMENT)
*                 NOTE: BO AND BI ARE NOT PROCESSED!
*
*         EXIT:   D0 HAS LEFT OVER BITS OF INTERRUPT STATUS. THE 'END' BIT
*                 WILL BE PROCESSED BY THIS ROUTINE BUT NOT CLEARED. ALL OTHER
*                 BITS PROCESSED WILL BE CLEARED.
*
*         USES:   D0-D3
*
*         HPL ROUTINE
*
********************************************************************************
H_ISR0    LSL     #8,D0                 ALTERNATE ENTRY TO BUILD FULL STAT
	  OR.B    H_INT1STAT(A1),D0     WORD IF ONLY BYTE 0 WAS READ.
H_ISR1    OR      H_INT0COPY(A2),D0     INCLUDE ANY SAVED BITS
	  MOVE.W  D0,D3                 SAVE COPY OF INT STATUS
	  AND     H_INTMSKSAV(A2),D3    KEEP ONLY THE ENABLED BITS IN D3
	  MOVE.W  H_INTMSKSAV(A2),D1    TURN OFF THE ENABLED BITS IN D0
	  NOT     D1
	  AND     D1,D0
	  MOVE.W  D0,H_INT0COPY(A2)     SEND THESE BACK TO BACKGROUND
	  MOVE.B  EIRB_OFF(A2),D2       GET CURRENT EIR BYTE
*
* PROCESS INTERRUPT CAUSES FROM INT1STAT:
*
	  BCLR    #6+8,D3               ARE THERE ANY INT1 CAUSES?
	  BEQ     H_NO_INT1             IF NOT, SKIP
	  SPC 1
	  BCLR    #0,D3                 IFC INTERRUPT?
	  BEQ.S   H_NO_IFC              IF NOT, SKIP
	   BSET   #3,H_FLAGS(A2)        ELSE SET IFC LATCH
	   BSR    H_LOG                 GO LOG INTERRUPT IF ENABLED
	  SPC 1
H_NO_IFC  BCLR    #1,D3                 SRQ INTERRUPT?
	  BEQ.S   H_NO_SRQ              IF NOT, SKIP
	   BSR    H_CHKSRQ              ELSE GO PROCESS SRQ INTERRUPT
	  SPC 1
H_NO_SRQ  BCLR    #2,D3                 MA INTERRUPT?
	  BEQ.S   H_NO_MA
	   MOVE.B #H_DACR0,H_AUXCMD(A1) RELEASE DAC HOLDOFF
	   BSR    H_CHKADDR             GO SEE IF WE SHOULD INTERRUPT
	  SPC 1
H_NO_MA   BCLR    #3,D3                 DCL/SDC INTERRUPT?
	  BEQ.S   H_NO_DCL
	   MOVE.B #H_DACR0,H_AUXCMD(A1) RELEASE DAC HOLDOFF
	   BSET   #4,H_FLAGS(A2)        SET DCL LATCH
	   BTST   #1,D2                 OTHER INTERRUPTS ENABLED?
	   BEQ.S  H_NO_DCL              IF NOT, SKIP
	   BSR    H_LOG                 ELSE JUST LOG EOL BRANCH
	  SPC 1
H_NO_DCL  BCLR    #5,D3                 UNIDENTIFIED COMMAND INTERRUPT?
	  BEQ.S   H_NO_UCG
	   MOVE.B H_CMDPASS(A1),D0      GET THE COMMAND
	   MOVE.B #H_DACR0,H_AUXCMD(A1) RELEASE DAC HOLDOFF
	   AND    #$7F,D0               IGNORE PARITY ON COMMANDS
	   CMP.B  #TCT,D0               IS THIS TAKE CONTROL?
	   BNE.S  H_NO_TCT              IF NOT, SKIP
*
*       waiting in ISR
*
*       trial for tct fix  11/29/81      4:47 PM
*
* tm        BTST  #0,H_FLAGS(A2)        IF THE 68000 IS TRYING TO PCT FROM
* tm        BNE.S H_TCTW1               ANOTHER SELECTCODE, THEN SKIP
H_TCTW      MOVE.W #8191,D5             tttt JS 8/1/83
*
*     Count changed from 4095 to 8191 to allow for 16 MHz processors
*     This is really much more than enough since card only can respond
*     at 8 MHz rate.   tttt  JS 8/1/83
*
H_TCTWL     BTST  #5,H_ADRSSTAT(A1)     ELSE WAIT FOR ATN TO DROP
	    DBEQ  D5,H_TCTWL
H_TCTW1     MOVE.B #H_RQC,H_AUXCMD(A1)  REQUEST CONTROL FROM 9914
	    MOVE.B #H_GTS,H_AUXCMD(A1)  AND DROP ATN
	    BTST  #6,D2                 ENABLED TO INTERRUPT?
	    BEQ.S H_NO_TCT              IF NOT, SKIP
	    BSR   H_LOG                 ELSE LOG THE BRANCH
H_NO_TCT  CMP.B   #PPC,D0               PARALLEL POLL CONFIGURE?
	  BNE.S   H_NO_PPC              IF NOT, SKIP
	   MOVE.B #H_PTS,H_AUXCMD(A1)   ELSE PASS THRU NEXT SECONDARY
H_NO_PPC  CMP.B   #PPU,D0               PARALLEL POLL UNCONFIGURE?
	  BEQ.S   H_PPE                 IF SO, TREAT SAME AS PPE
	  CMP.B   #$60,D0               GENERAL SECONDARY?
	  BLT.S   H_NO_PPE              IF NOT, THEN NOT PPE/PPD
H_PPE      BSR    HPL_WTC3              ELSE GO SET PPOLL CONFIGURATION
H_NO_PPE   EQU    *                     PROCESS OTHER UCG VALUES HERE
	  SPC 1
H_NO_UCG  BCLR    #7,D3                 GET INTERRUPT?
	  BEQ.S   H_NO_GET              IF NOT, SKIP
	   MOVE.B #H_DACR0,H_AUXCMD(A1) ELSE RELEASE DAC HOLDOFF
	   BSET   #5,H_FLAGS(A2)        AND SET GET LATCH
	   BSR    H_LOG                 GO LOG INTERRUPT IF ENABLED
H_NO_GET   EQU    *                     PROCESS OTHER INT1 CAUSES HERE
*
* PROCESS INTERRUPT CAUSES FROM INT0STAT:
*
H_NO_INT1 BCLR    #7+8,D3               ARE THERE ANY INT0 CAUSES?
	  BEQ.S   H_NO_INT0             IF NOT, SKIP
	  SPC 1
	  BCLR    #1+8,D3               RLC INTERRUPT?
	  BEQ.S   H_NO_RLC              IF NOT SKIP
	   BSR    H_LOG                 GO LOG INTERRUPT IF ENABLED
	  SPC 1
H_NO_RLC  BCLR    #2+8,D3               SPAS INTERRUPT?
	  BEQ.S   H_NO_SPAS             IF NOT, SKIP
	   BCLR   #6,H_FLAGS(A2)        ELSE INDICATE rsv IS NOW 0
	   MOVE.B H_PPOLLMSK+1(A2),H_PPOLL(A1) AND UPDATE PPOLL
	  SPC 1
H_NO_SPAS BTST    #3+8,D3               END INTERRUPT?
	  BEQ.S   H_NO_END              IF NOT, SKIP
	  BSET    #0,H_STAT3(A2)           ELSE SET EOR LATCH
	  SPC 1
H_NO_END  EQU     *                     PROCESS OTHER INT0 CAUSES HERE
H_NO_INT0 MOVE.W  D3,D0                 PUT REMAINING INT BITS BACK INTO D0
	  RTS                           FOR CALLER.
	  TTL IOLIB EXTH - HPIB ISR SUPPORT ROUTINES
	  PAGE
********************************************************************************
*
*       H_CHKADDR
*
*         SUBROUTINE TO CHECK FOR ADDRESS INTERRUPT
*
*         ENTRY:  D2.B = EIR BYTE
*
*         IF THE TLK (LST) BIT OF THE EIR BYTE IS TRUE AND THE 9914
*         IS ADDRESSED AS TALKER (LISTENER), THEN LOG AN EOL BRANCH.
*
*         HPL ROUTINE
*
********************************************************************************
H_CHKADDR BTST   #5,D2                  INTERRUPT ON TALKER ENABLED (TLK)?
	  BEQ.S  H_CHKA1                IF NOT, SKIP
	   BTST  #1,H_ADRSSTAT(A1)      ARE WE TALKER?
	   BNE   H_LOG                  IF SO, GO LOG INTERRUPT
H_CHKA1   BTST   #4,D2                  INTERRUPT ON LISTEN ENABLED (LST)?
	  BEQ.S  H_CHKA2                IF NOT, SKIP
	   BTST  #2,H_ADRSSTAT(A1)      ARE WE LISTENER?
	   BNE   H_LOG                  IF SO, GO LOG INTERRUPT
H_CHKA2   RTS                           ELSE RETURN
********************************************************************************
*
*       H_CHKSRQ
*
*         SUBROUTINE TO CHECK FOR SRQ INTERRUPT
*
*         ENTRY:  EIRB_OFF(A2) HAS ENABLE MASK
*
*         IF WE ARE CONTROLLER AND SRQ IS SET AND BIT 7 OF ENABLE BYTE
*         IS SET THEN LOG EITHER A NORMAL SRQ INTERRUPT.
*
*         HPL ROUTINE
*
********************************************************************************
H_CHKSRQ  BTST   #6,H_EXTSTAT(A1)       ARE WE CONTROLLER?
	  BNE.S  H_CHKS2                IF NOT, DO NOTHING
	  BTST   #2,H_BUSSTAT(A1)       IS SRQ SET?
	  BEQ.S  H_CHKS2                IF NOT, DO NOTHING
	  BCLR   #7,EIRB_OFF(A2)        ARE WE ENABLED FOR SRQ?
	  BEQ.S  H_CHKS2                IF NOT, DO NOTHING
H_CHKS1    BSR   H_LOG                  ELSE DO NORMAL LOGING
H_CHKS2   RTS                           DONE CHECKING FOR SRQ
	  SPC    4
*
*       H_LOG    mark that an isr condition is
*                pending
*
H_LOG     BSET   #1,H_FLAGS(A2)         set condition
	  RTS
	  TTL IOLIB EXTH - HPIB TRANSFER
	  PAGE
********************************************************************************
*
*       H_TFR
*
*         DRIVER CALL FOR EXECUTION OF tfr STATEMENT
*
*         ENTRY:  CONDITIONS OTHER THAN NORMAL A1,A2 ARE:
*                 A3.L = POINTER TO TRANSFER INFORMATION
*
*         HPL ROUTINE ( MODIFIED BEYOND ALL RECOGNITION )
*
********************************************************************************
H_TFR     JSR    CHECK_TFR              wait for  tfr to finish ( timed )
	  MOVE.B #H_GTS,H_AUXCMD(A1)    MAKE SURE ATN IS FALSE
	  TST.B  T_BW_OFF(A3)           DON'T ALLOW WORD TRANSFERS
	  BNE    H_NOWORD
	  MOVE.L TCNT_OFF(A3),D0        GET COUNT
	  CLR.W  D1                     \
	  MOVE.B TUSR_OFF(A3),D1         \   COMPUTE OFFSET INTO JUMP TABLE
	  ADD.W  D1,D1                    \
	  JSR    TESTDMA                  /  BASED ON TFR TYPE AND DMA PRESENCE
	  BEQ.S  H_NODMA                 /
	  ADDI.W #20,D1                 /
H_NODMA   LEA    H_TBL,A0               \
	  ADDA.W 0(A0,D1),A0             INDEXED JUMP THRU TABLE
	  JMP    (A0)                   /
*
*         TRANSFER JUMP TABLE
*
*                               --------------------  DMA is not installed or available
H_TBL     DC.W   HTERR_B-H_TBL  serial  interrupt
	  DC.W   HTERR_D-H_TBL  serial  dma
	  DC.W   H_T_FHS-H_TBL  serial  fhs
	  DC.W   H_T_FHS-H_TBL  serial  fastest
	  DC.W   HTERR_B-H_TBL  serial  overlap
*                               --------------------
	  DC.W   H_T_INT-H_TBL  overlap interrupt
	  DC.W   HTERR_D-H_TBL  overlap dma
	  DC.W   H_T_BST-H_TBL  overlap fhs
	  DC.W   H_T_BST-H_TBL  overlap fastest
	  DC.W   H_T_INT-H_TBL  overlap overlap
*                               --------------------  DMA is installed
	  DC.W   HTERR_B-H_TBL  serial  interrupt
	  DC.W   H_T_DMA-H_TBL  serial  dma
	  DC.W   H_T_FHS-H_TBL  serial  fhs
	  DC.W   H_T_DMA-H_TBL  serial  fastest
	  DC.W   HTERR_B-H_TBL  serial  overlap
*                               --------------------
	  DC.W   H_T_INT-H_TBL  overlap interrupt
	  DC.W   H_T_DMA-H_TBL  overlap dma
	  DC.W   H_T_BST-H_TBL  overlap fhs
	  DC.W   H_T_DMA-H_TBL  overlap fastest
	  DC.W   H_T_DMA-H_TBL  overlap overlap
	  PAGE
*
*         Transfer DMA
*
H_T_DMA   CMP.L  #1,D0                  \ USE INTR IF COUNT=1 ON DMA
	  BEQ    H_T_INT                /
	  MOVE.B #TT_DMA,TACT_OFF(A3)   set tfr type to DMA
	  TST.B  TDIR_OFF(A3)           \ test for transfer direction
	  BNE    H_TOD                  /
*
*         Transfer Input Dma:
*
H_TID     EQU    *
* tm      MOVEQ  #0,D0                  DISABLE CARD INTRPTS      hphp TM 1/25/83
* tm      BSR    H_EIR                                            hphp TM 1/25/83
	  MOVE.B #H_DAI1,H_AUXCMD(A1)   disable hpib card       ( SPR740 TM 5/24/82 )
	  BTST   #6,H_EXTSTAT(A1)       ARE WE ACTIVE CONTROLLER?
	  BEQ.S  H_TID_0                IF SO, SKIP
*
*         non controller path
*
	  MOVE.B #TT_INT,TACT_OFF(A3)   fake tfr type as intr   ( SPR740 TM 5/24/82 )
	  MOVE.L TCNT_OFF(A3),D0        copy count so this works( qqqq   TM 12/16/82 )
	  JSR    STBSY                  set buf busy ( intr )   ( SPR740 TM 5/24/82 )
	  BSR    H_RHDF_S               OTHERWISE RELEASE HOLD OFF AND WAIT
	  BSR    H_WAIT_BI              AROUND FOR THE FIRST BYTE TO APPEAR.
	  BCLR   #7,H_FLAGS(A2)         INSURE WON'T RE RELEASE HOLDOFF
*
*         at this point BYTE IN is true.  IF EOI and EOI term     hphp   TM 1/26/83
*         are true then the tfr should be faked out as finished.  hphp   TM 1/26/83
*
	  BTST   #0,H_STAT3(A2)         \ is EOI set              hphp   TM 1/26/83
	  BEQ.S  H_TID_0                /                         hphp   TM 1/26/83
	  TST.B  TEND_OFF(A3)           \ is EOI term. enabled    hphp   TM 1/26/83
	  BEQ.S  H_TID_0                /                         hphp   TM 1/26/83
*
*         at this point - fake that the tfr is finished           hphp   TM 1/26/83
*
H_TID_F   JSR     ITXFR                 get appropriate ptrs.     hphp   TM 1/26/83
	  MOVE.B  H_DATAIN(A1),D4       get data byte             hphp   TM 1/26/83
	  MOVE.B  D4,(A0)+              SAVE CHARACTER IN BUFFER  hphp   TM 1/26/83
	  MOVE.L  A0,TFIL_OFF(A3)       AND SAVE NEW FILL PTR     hphp   TM 1/26/83
	  SUBQ.L  #1,D3                 we have TFR'D ALL CHARS   hphp   TM 1/26/83
	  MOVE.L  D3,TCNT_OFF(A3)       SAVE TRANSFER COUNT...    hphp   TM 1/26/83
	  BSET    #7,H_FLAGS(A2)        SET HOLDOFF INDICATOR     hphp   TM 1/26/83
	  JSR     STCLR                 MARK THE BUFFER FINISHED  hphp   TM 1/26/83
	  BRA.S   H_TID_E               if done then finished     hphp   TM 1/26/83
*
*         common controller/non-controller path
*
H_TID_0   EQU    *                                              ( SPR740 TM 5/28/82 )
	  MOVE.B #TT_DMA,TACT_OFF(A3)   restore type as DMA     ( SPR740 TM 5/24/82 )
	  MOVE.L TCNT_OFF(A3),D0        RESTORE D0
	  SUBQ.L #1,D0                  DMA CH SHOULD ONLY DO N-1 BYTES.
	  JSR    GETDMA                 TRY FOR DMA CHANNEL
	  MOVE.W D2,(A4)                ARM THE CHANNEL
	  BSR    HD_STBSY               SET BUFFER BUSY, ETC    ( SPR740 TM 5/24/82 )
	  TST.B  TEND_OFF(A3)           IF EOI TAG, THEN TELL   ( SPR740 TM 5/28/82 )
	  BEQ.S  H_TID_1                9914 TO HOLD OFF ON END ( SPR740 TM 5/28/82 )
	  MOVE.B #H_HDFE1,H_AUXCMD(A1)                          ( SPR740 TM 5/28/82 )
H_TID_1   MOVE.B #H_HDFA0,H_AUXCMD(A1)  TURN OFF HOLD OFF ON ALL
	  BSR.S  H_RHDF_S               DO RHDF IF NECESSARY
	  MOVE.B D3,3(A1)               ENABLE CARD FOR DMA
*
*         common exit for input DMA tfr
*
H_TID_E   EQU    *                                              ( SPR740 TM 5/28/82)
	  MOVE.B #H_DAI0,H_AUXCMD(A1)   enable hpib card        ( SPR740 TM 5/24/82 )
	  BRA.S  H_DMA_W                DONE
*
*         Transfer Output Dma:
*
H_TOD     TST.B  TEND_OFF(A3)           IF EOI TAG IS SET, THEN LET DMA
	  BEQ.S  H_TOD_1                   DO ONLY N-1 BYTES AND DO THE LAST
	  SUBQ.L #1,D0                     UNDER INTERRUPT
H_TOD_1   JSR    GETDMA                 GET A DMA CHANNEL
	  MOVE.W D2,(A4)                ARM THE CHANNEL
	  BSR    HD_STBSY               SET BUFFER BUSY, ETC
* tm      MOVEQ  #0,D0                  DISABLE USER INTERRUPTS   hphp TM 1/25/83
* tm      BSR    H_EIR                                            hphp TM 1/25/83
	  MOVE.B D3,3(A1)               ENABLE CARD FOR DMA
*
*       H_DMA_W                         IF SERIAL THEN WAIT FOR  COMPLETION
*
H_DMA_W   MOVE.B TUSR_OFF(A3),D4        \
	  CMP.B  #5,D4                   IS THE TRANSFER OVERLAP ?
	  BGE.S  H_DMA_W2               /
H_DMA_W1  CMPI.B #255,T_SC_OFF(A3)      IF NOT THEN WAIT TILL DONE
	  BNE.S  H_DMA_W1
H_DMA_W2  RTS
	  PAGE
*
*         Transfer INTERRUPT
*
H_T_INT   MOVE.B #TT_INT,TACT_OFF(A3)   set tfr type to INTERRUPT
	  BRA.S  H_T_BIC                go to common code
	  SPC    3
*
*         Transfer BURST ( intr on 1st byte FHS on rest )
*
H_T_BST   MOVE.B #TT_BURST,TACT_OFF(A3) set tfr type to BURST
*         BRA.S  H_T_BIC                go to common code
	  SPC    3
*
*         common interrupt and burst code
*
H_T_BIC   JSR    STBSY                  SET BUFFER BUSY, ETC
	  TST.B  TDIR_OFF(A3)           \ test for transfer direction
	  BNE.S  H_TOI                  /
*
*         Transfer Input Interrupt or Transfer Input Burst
*
H_TII     EQU    *
* tm      MOVEQ  #9,D0                  ENABLE CARD FOR BYTE IN
* tm      BSR    H_EIR
	  MOVE.W #$2000,D0              ENABLE CARD FOR BI  ( hphp TM 1/19/83 )
	  BSR    H_ENABLE                                   ( hphp TM 1/19/83 )
	  BSR.S  H_RHDF_S               should we release holdoff
	  BRA    H_DMA_W                see if tfr was serial - and wait
*                                       if it was
*
*
*
H_RHDF_S  BCLR   #7,H_FLAGS(A2)         SHOULD WE RELEASE HOLDOFF?
	  BEQ.S  H_RHDF_S1              IF NOT, SKIP
	  BCLR   #0,H_STAT3(A2)         clear eor flag
	  MOVE.B #H_RHDF,H_AUXCMD(A1)   ELSE DO IT
H_RHDF_S1 RTS
*
*         Transfer Output Interrupt or Transfer Output Burst
*
H_TOI     EQU    *
* tm      MOVEQ  #4,D0                  ENABLE FOR BYTE OUT
* tm      BSR    H_EIR
	  MOVE.W #$1000,D0              ENABLE CARD FOR BO  ( hphp TM 1/19/83 )
	  BSR    H_ENABLE                                   ( hphp TM 1/19/83 )
	  BRA    H_DMA_W                wait if serial
	  PAGE
******************************************************************************
*                             Transfer FHS                                   *
******************************************************************************
*
* WARNING: these FHS routines have been carefully optimized towards...
*   1. a close FHS coupling with Coyote (Greeley's new 913X Disc Controller)
*   2. efficient Series 200 to Series 200 transfers
*   3. efficient high-speed disc transfers
* While the inner loops can be tuned for higher-speed transfers with
* selected other devices, doing so will almost certainly compromise the
* above optimizations!  If you decide to optomize further, keep in mind
* that: 1) the internal and external HPIB's behave differently with the
* same FHS loop!!!, and 2) the 9914 & 9914A are programmed for different
* T1 delays!!!  Good Luck!
*                                               J Cowan

*
* special register assignments for the fast handshake transfer routines:
*
fhs_eoi_bit  equ d5              always set to 0 for the eoi bit test
fhs_BI_stat  equ d6              set to $20 for input  (int0stat w/ BI only)
fhs_BO_stat  equ d6              set to $10 for output (int0stat w/ BO only)
fhs_BI_bit   equ d7              set to 5 for input  (the BI bit number)
fhs_BO_bit   equ d7              set to 4 for output (the BO bit number)
fhs_int0stat equ a4              permanent pointer to the int0stat register
fhs_auxcmd   equ a5              permanent pointer to the auxcmd   register
fhs_datain   equ a6              permanent pointer to the datain   register
fhs_dataout  equ fhs_datain      permanent pointer to the dataout  register


H_T_FHS   MOVE.B #TT_FHS,TACT_OFF(A3)           set tfr type to FAST HANDSHAKE
	  JSR    STBSY                          make buffer busy
	  JSR    ITXFR                          set up pointers and registers

	  movem.l fhs_int0stat-fhs_datain,-(sp)
	  moveq   #0,fhs_eoi_bit
	  lea     h_int0stat(a1),fhs_int0stat
	  lea     h_auxcmd(a1),fhs_auxcmd
	  lea     h_datain(a1),fhs_datain

	  move.b  #h_dai1,(fhs_auxcmd)          disable all card interrupts!

	  TST.B  TDIR_OFF(A3)                   which transfer direction?
	  BNE    fto                            branch if output

	  BSR     H_RHDF_S                      input; release holdoff if necessary

	  moveq   #$20,fhs_BI_stat              int0stat with BI only
	  moveq   #5,fhs_BI_bit                 the BI bit number

	  TST    D2                             termination character specified?
	  BPL    fti                            branch if so
	  page
*
*         Transfer FHS in; NO termination character
*
	  move.b  #h_hdfa0,(fhs_auxcmd)         release holdoff on all
	  subq.l  #2,d3                         count-2!
	  bge.s   fti_nt_i1                     initial BI test (n-1 bytes loop)
	  bra.s   fti_nt_i2                     initial BI test (last byte loop)

*
* high-speed loop for n-1 bytes
*
fti_nt_w1 move.b  (fhs_int0stat),d1             get card status
	  beq     fti_nt_w1                     loop until we get something
	  cmp.b   d1,fhs_BI_stat                BI status only?
	  bne.s   fti_nt_s1                     if not, process other conditions
fti_nt_t1 move.b  (fhs_datain),(a0)+            transfer this data byte and request the next
	  dbra    d3,fti_nt_w1                  loop until lower count exhausted

	  clr     d3                            clear lower count word only
	  subq.l  #1,d3                         decrement the entire long count
	  bpl     fti_nt_w1                     loop until entire long count exhausted

*
* last byte handling
*
fti_nt_w2 move.b  (fhs_int0stat),d1             get card status
	  beq     fti_nt_w2                     loop until we get something
	  cmp.b   d1,fhs_BI_stat                BI status only?
	  beq.s   fti_nt_t2                     if so, transfer the byte
	  bsr.s   j_fakeisr                     otherwise, process the other conditions
fti_nt_i2 bclr    fhs_BI_bit,h_int0copy(a2)     see if BI was logged
	  beq     fti_nt_w2                     if not, keep waiting
fti_nt_t2 move.b  #h_hdfa1,(fhs_auxcmd)         set holdoff on all again
	  move.b  (fhs_datain),(a0)+            transfer the last data byte
	  addq.l  #1,d3                         correct remaining count
	  bra     h_tfi_trm                     go terminate

*
* special status handling: n-1 bytes loop
*
fti_nt_s1 bsr.s   j_fakeisr                     process the other conditions
fti_nt_i1 bclr    fhs_BI_bit,h_int0copy(a2)     BI logged?
	  beq     fti_nt_w1                     if not, keep testing status
	  btst    fhs_eoi_bit,h_stat3(a2)       BI logged; was EOI set?
	  beq.s   fti_nt_t1                     if not, go transfer the byte
	  tst.b   tend_off(a3)                  BI w/ EOI; should we terminate?
	  bne.s   fti_nt_t2                     if so, transfer the last byte
	  bclr    fhs_eoi_bit,h_stat3(a2)       otherwise, clear the eoi flag
	  bra     fti_nt_t1                     and continue transferring bytes

	  page
*
*         restoration of A5/6 required because fakeisr
*         can call a PASCAL user procedure
*
j_fakeisr movem.l (sp)+,fhs_int0stat-fhs_datain restore the dedicated registers
	  bsr     h_fakeisr
	  movem.l fhs_int0stat-fhs_datain,-(sp)
	  lea     h_int0stat(a1),fhs_int0stat
	  lea     h_auxcmd(a1),fhs_auxcmd
	  lea     h_datain(a1),fhs_datain
	  rts



*
*         Transfer FHS in; looking for a termination character
*
fti       moveq   #0,d4                         clear upper byte to enable word comparison
	  bra.s   fti_it                        make the initial BI test

fti_fi    bsr     j_fakeisr                     process the other conditions
fti_it    bclr    fhs_BI_bit,h_int0copy(a2)     see if BI was logged
	  bne.s   fti_BI                        branch if so

fti_wl    move.b  (fhs_int0stat),d1             get card status
	  beq     fti_wl                        keep trying until we get something
	  cmp.b   d1,fhs_BI_stat                BI status only?
	  bne.s   fti_fi                        if not, process other conditions

fti_BI    move.b  (fhs_datain),d4               get the data byte
	  move.b  d4,(a0)+                      save it in the buffer
	  btst    fhs_eoi_bit,h_stat3(a2)       was EOI set?
	  beq.s   fti_tc                        branch if not
	  tst.b   tend_off(a3)                  EOI was set; do we terminate?
	  beq.s   fti_ceoi                      branch if not
	    move.w  d4,d2                         else use trick to make tfr terminate
	    bra.s  fti_tc
fti_ceoi  bclr    fhs_eoi_bit,h_stat3(a2)       clear the eoi flag
fti_tc    subq.l  #1,d3                         termination count expired?
	  ble.s   h_tfi_trm                     branch if so
	  cmp.w   d4,d2                         termination character match?
	  beq.s   h_tfi_trm                     branch if so
	  move.b  #h_rhdf,(fhs_auxcmd)          else ask for another byte
	  bra     fti_wl                        and go wait for it

	  page
*
*         Transfer FHS out
*
fto       moveq   #$10,fhs_BO_stat              int0stat with BO only
	  moveq   #4,fhs_BO_bit                 the BO bit number
	  subq.l  #2,d3                         count-2!
	  bge.s   fto_i1                        initial BO test (n-1 bytes loop)
	  bra.s   fto_i2                        initial BO test (last byte loop)

*
* high-speed loop for n-1 bytes
*
fto_w1    move.b  (fhs_int0stat),d1             get card status
	  beq     fto_w1                        loop until we get something
	  cmp.b   d1,fhs_BO_stat                BO status only?
	  bne.s   fto_s1                        if not, process other conditions
fto_t1    move.b  (a0)+,(fhs_dataout)           transfer a byte
	  dbra    d3,fto_w1                     loop until lower count exhausted

	  clr     d3                            clear lower count word only
	  subq.l  #1,d3                         decrement the entire long count
	  bpl     fto_w1                        loop until entire long count exhausted

*
* last byte handling
*
fto_w2    move.b  (fhs_int0stat),d1             get card status
	  beq     fto_w2                        loop until we get something
	  cmp.b   d1,fhs_BO_stat                BO status only?
	  beq.s   fto_t2                        if so, transfer the byte
	  bsr     j_fakeisr                     otherwise, process the other conditions
fto_i2    bclr    fhs_BO_bit,h_int0copy(a2)     see if BO was logged
	  beq     fto_w2                        if not, keep waiting
fto_t2    tst.b   tend_off(a3)                  should we tag it with an EOI?
	  beq.s   fto_ob                        branch if not
	  move.b  #h_feoi,(fhs_auxcmd)          else tag it!
fto_ob    move.b  (a0)+,(fhs_dataout)           output the last byte

	  MOVE.L  TCNT_OFF(A3),D3               \
	  ADD.L   D3,TEMP_OFF(A3)               / update empty pointer
	  CLR.L   TCNT_OFF(A3)                  clear count
	  BRA.S   H_TFO_TRM                     ELSE WE ARE DONE!

*
* special status handling: n-1 bytes loop
*
fto_s1    bsr     j_fakeisr                     process the other conditions
fto_i1    bclr    fhs_BO_bit,h_int0copy(a2)     see if BO was logged
	  bne     fto_t1                        if so, go transfer the byte
	  bra     fto_w1                        otherwise, keep waiting

	  PAGE
*
* FHS TRANSFER TERMINATION
*
H_TFI_TRM MOVE.L  TCNT_OFF(A3),D4               get intended count
	  MOVE.L  D3,TCNT_OFF(A3)               D3 has bytes not finished
	  SUB.L   D3,D4                         D4 has bytes transfered
	  ADD.L   D4,TFIL_OFF(A3)               update fill pointer
	  BSET    #7,H_FLAGS(A2)                SET HOLDOFF INDICATOR
H_TFO_TRM andi.b  #$cf,h_int0copy(a2)
	  move.b  #h_dai0,(fhs_auxcmd)          re-enable card interrupts!
	  movem.l (sp)+,fhs_int0stat-fhs_datain restore the dedicated registers
	  JMP     STCLR                         MARK BUFFER FINISHED & RETURN



********************************************************************************
*
*       HD_STBSY
*
*         ROUTINE TO SET A DMA TFR BUFFER BUSY
*
*         ENTRY:
*                 D0.L = TRANSFER COUNT TO BE PUT IN TCNT_OFF(A2)
*                        AND TO BE ADDED TO E/F COUNT.
*                 A0.L = POINTER TO DMA TEMPS ( DMA1 OR DMA0 )
*                 A2.L = POINTER TO DRIVER TEMPS
*                 A3.L = POINTER TO BUFFER CTL BLOCK
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
HD_STBSY  LEA     EXTH_EH_TDMA,A4       \
	  JMP     DMA_STBSY             /  SAVE H_DMATERM ROUTINE IN DMA TEMPS
	  PAGE
	  END

@


56.2
log
@
pws2rcs automatic delta on Wed Jan 27 11:57:27 MST 1993
@
text
@d1 2328
@


56.1
log
@Automatic bump of revision number for PWS version 3.25
@
text
@a0 2328
	TTL IOLIB EXTH - HPIB DRIVERS
	PAGE
********************************************************************************
*
*       COPYRIGHT (C) 1985 BY HEWLETT-PACKARD COMPANY
*
********************************************************************************
*
*
*       IOLIB     EXTH
*
*
********************************************************************************
*
*
*
*       Library - IOLIB
*       Author  - Tim Mikkelsen
*       Phone   - 303-226-3800  ext. 2910
*
*       Purpose - This set of assembly language code is intended to be used as
*                 a PASCAL module for I/O drivers for use by the external I/O
*                 procedures library.
*
*                 Most of this code is taken from Bob Hallissy's HPL code.
*
*       Date    - 08/18/81
*       Update  - 08/01/83
*       Release -  7/12/85
*
*
*       Source  - IOLIB:HPIB.TEXT
*       Object  - IOLIB:HPIB.CODE
*
*
********************************************************************************
*
*
*       RELEASED
*       VERSION         3.1
*
*
********************************************************************************
	 PAGE
****************************************************************************
*                                                                          *
*                                                                          *
*      BUG FIX HISTORY         - after release 1.0                         *
*                                                                          *
*                                                                          *
*      BUG #   BY  / ON        LOC             DESCRIPTION                 *
*      -----   -----------     --------------  ----------------------      *
*                                                                          *
*      SPR695  T Mikkelsen     HPL_WTC         the HPIB cards will not     *
*              04/21/1982                      respond properly to a PPC/  *
*                                              PPE setup of ppoll info     *
*                                                                          *
*      SPR740  T Mikkelsen     H_TID           DMA input transfers will    *
*              05/28/1982                      not terminate properly if   *
*                                              there is an EOI termination *
*                                              and EOI is true on the      *
*                                              first byte and the byte     *
*                                              comes in immediately.  This *
*                                              is a big problem for disk   *
*                                              transfers.                  *
*                                                                          *
*      SPRxxx  T Mikkelsen     H_BYTTST        DMA input transfers will    *
*              06/14/1982                      not terminate properly if   *
*              07/21/1982                      the device is very fast and *
*                                              EOI is true on the last     *
*                                              byte.  Due to DMA on lvl 3  *
*                                              and an external HPIB card   *
*                                              on lvl 4,5, or 6.           *
*                                                                          *
*      475     T Mikkelsen     all over        Change BSRs into JSRs to    *
*              09/17/1982                      allow re-placement of the   *
*                                              modules.  Also in GPIO and  *
*                                              Data Comm.                  *
*                                                                          *
*      564     T Mikkelsen     H_WTC_PPC       IOCONTROL(sc,2,x) does not  *
*              10/22/1982                      work - set up PPOLL byte.   *
*                                              Always responds with a      *
*                                              PPOLL response of 4.        *
*                                                                          *
****************************************************************************
*                                                                          *
*                                                                          *
*                                                                          *
*      BUG FIX HISTORY         - after release 2.0                         *
*                                                                          *
*                                                                          *
*      BUG #   BY  / ON        LOC             DESCRIPTION                 *
*      -----   -----------     --------------  ----------------------      *
*                                                                          *
*      qqqq    T Mikkelsen     H_TID           Non active controller DMA   *
*              12/16/1982                      transfers do not work.      *
*                                              They mess up the count.     *
*                                                                          *
*      rrrr    T Mikkelsen     H_EIR           Re-enabling interrupts when *
*              12/17/1982                      srq is already asserted do  *
*                                              not work.                   *
*                                                                          *
*      wuwu    T Mikkelsen     H_DMATERM       Re-enabling interrupts when *
*              01/19/1983                      ON EOT routine is called    *
*                                              due to flukey term emulator *
*                                              problem.                    *
*                                                                          *
*      hphp    T Mikkelsen     H_INIT_S        Allowing DMA non-ctlr tfrs  *
*              01/28/1983      H_EIR           to be started from inside   *
*                              H_DMATERM       user ISR.                   *
*                              H_ISR                                       *
*                              H_TFR                                       *
*                              H_ENABLE H_DISABLE                          *
*                                                                          *
*      ????    J Cowan         H_T_FHS         Even though FHS with the    *
*              02/02/1983                      internal HPIB to Coyote     *
*                                              makes the interleave, FHS   *
*                                              with the external HPIB to   *
*                                              Coyote does not!!!          *
*                                                                          *
*      tttt    J Schmidt       H_WAIT_BO       Timing changes for 680xx    *
*              08/01/1983      H_WAIT_BI       processors on UMM CPU boards*
*              05/02/1984      H_P_POLL                                   *
*                              H_IFC                                       *
*                              H_ISR0                                      *
*                                                                          *
****************************************************************************
	PAGE
********************************************************************************
*
*
*       The following lines are used to tell the LINKER/LOADER what this module
*       looks like in PASCAL terms.
*
*       Note that it is possible to create assembly modules that are functions.
*       These routines are called through an indirect pointer using the CALL
*       facility which does NOT permit functions.
*
*       This module is called 'EXTH' ( upper or lower case - doesn't matter )
*       independent of the file name ( by use of the MNAME pseudo-op ).
*
*       All the externally used procedures are called 'EXTH_@@@@@@@@@@@@@@@@' in
*       this module.  If you are using assembly to access them use the
*       'EXTH_@@@@@@@@@@@@@@' name.  If you are using Pascal use the '@@@@@@@@@@@@@@'
*       name.
*
********************************************************************************
	MNAME EXTH
	SRC MODULE EXTH;
	SRC IMPORT iodeclarations;
	SRC EXPORT
	SRC        PROCEDURE eh_init  ( temp : ANYPTR );
	SRC        PROCEDURE eh_isr   ( temp : ANYPTR );
	SRC        PROCEDURE eh_rdb   ( temp : ANYPTR ;  VAR x : CHAR);
	SRC        PROCEDURE eh_wtb   ( temp : ANYPTR ;  val   : CHAR);
	SRC        PROCEDURE eh_rdw   ( temp : ANYPTR ;  VAR x : io_word);
	SRC        PROCEDURE eh_wtw   ( temp : ANYPTR ;  val   : io_word);
	SRC        PROCEDURE eh_rds   ( temp : ANYPTR ;  reg   : io_word;
	SRC                                              VAR x : io_word);
	SRC        PROCEDURE eh_wtc   ( temp : ANYPTR ;  reg   : io_word;
	SRC                                              val   : io_word );
	SRC        PROCEDURE eh_tfr   ( temp : ANYPTR ;  bcb   : ANYPTR );
	SRC        PROCEDURE eh_send  ( temp : ANYPTR ;  val   : CHAR );
	SRC        PROCEDURE eh_end   ( temp : ANYPTR ;  VAR x : BOOLEAN );
	SRC        PROCEDURE eh_ppoll ( temp : ANYPTR ;  VAR x : CHAR );
	SRC        PROCEDURE eh_clr   ( temp : ANYPTR ;  line  : io_bit );
	SRC        PROCEDURE eh_set   ( temp : ANYPTR ;  line  : io_bit );
	SRC        PROCEDURE eh_test  ( temp : ANYPTR ;  line  : io_bit ;
	SRC                                              VAR x : BOOLEAN );
	SRC END; { of EXTH }
	PAGE
********************************************************************************
*
*       SYMBOLS FOR EXPORT AS PROCEDURE NAMES
*
********************************************************************************
	DEF EXTH_EXTH
	SPC 1
	DEF EXTH_EH_INIT
	DEF EXTH_EH_ISR,EXTH_EH_TDMA
	DEF EXTH_EH_RDB,EXTH_EH_WTB
	DEF EXTH_EH_RDW,EXTH_EH_WTW
	DEF EXTH_EH_RDS,EXTH_EH_WTC
	DEF EXTH_EH_TFR
	SPC 1
	DEF EXTH_EH_SEND,EXTH_EH_PPOLL,EXTH_EH_SET
	DEF EXTH_EH_CLR,EXTH_EH_TEST,EXTH_EH_END
	SPC 5
********************************************************************************
*
*       SYMBOLS FOR IMPORT - COMMON ASSEMBLY LANGUAGE ROUTINES
*
*       THE ROUTINES ARE IN THE MODULE COMMON_ASSEMBLY
*       THE TIMER ROUTINES ARE IN THE FILE "POWERUP"
*
********************************************************************************
	REFA DROPDMA            give up dma resource
	REFA GETDMA             actually get dma
	REFA TESTDMA            check to see if dma is available
	REFA LOGINT             branch to user isr
	REFA LOGEOT             branch to user eot
	REFA STBSY              set buffer busy
	REFA STCLR              set buffer not busy
	REFA DMA_STBSY          set buffer dma busy
	REFA ITXFR              is there a tfr active ?
	REFA ABORT_IO           kill any tfr active
	REFA WAIT_TFR           timed wait for tfr active
	REFA CHECK_TFR          timed wait for tfr - direction
	REFA DELAY_TIMER        timed delay
	REFA CHECK_TIMER        timed wait for timeout checking

*       change references to allow long jumps when the I/O      475 JPC 9/17/82
*       modules get moved around                                475 JPC 9/17/82
	LMODE   DROPDMA,GETDMA,TESTDMA,LOGINT,LOGEOT,STBSY
	LMODE   STCLR,DMA_STBSY,ITXFR,ABORT_IO,WAIT_TFR,CHECK_TFR
	LMODE   DELAY_TIMER,CHECK_TIMER

	TTL IOLIB EXTH - COMMON EQUATES AND DEFINITIONS
	PAGE
	INCLUDE IOLIB:COMDCL
	TTL IOLIB EXTH - HPIB DRIVER EQUATES
	PAGE
*
H_INT0COPY  EQU AVAIL_OFF+0     COPY OF INT0STAT REGISTER
H_INT1COPY  EQU AVAIL_OFF+1     COPY OF INT1STAT REGISTER
H_INTMSKSAV EQU AVAIL_OFF+2     COPY OF INT0MASK & INT1MASK
H_STAT3     EQU AVAIL_OFF+4     STATUS BYTE 3 MASK:
*                                   BIT 0:  EOR LATCH
*                                   BITS 1-7: 0
H_FLAGS     EQU AVAIL_OFF+5     DRIVER FLAGS AND STATUS BYTE 0 MASK:
*                                   BIT 0:  PASS CONTROL FLAG
*                                   BIT 1:  USER ISR TO BE CALLED ( IN ISR )
*                                   BIT 2:  ERROR INDICATOR
*                                   BIT 3:  IFC INDICATOR
*                                   BIT 4:  DCL INDICATOR
*                                   BIT 5:  GET INDICATOR
*                                   BIT 6:  CURRENT rsv STATUS BIT.
*                                   BIT 7:  IF SET, 9914 IS IN HOLDOFF MODE, THEREFORE
*                                           ISSUE RELEASE HOLD OFF BEFORE READING, AND
*                                           USE TAKE CONTROL SYNC TO SET ATN.
H_PPOLLMSK  EQU AVAIL_OFF+6     VALUE TO PUT IN H_PPOLL WHEN ist = 1
*           EQU AVAIL_OFF+7     VALUE TO PUT IN H_PPOLL WHEN ist = 0
	    SPC 4
	    TTL IOLIB EXTH - PASCAL ENTRY POINTS
	    PAGE
********************************************************************************
*
*         PASCAL DRIVER ENTRY POINTS FOR HP-IB CARDS
*
********************************************************************************
	  SPC 1
*
*         Module initialization
*
EXTH_EXTH EQU *
	  RTS                   Do nothing
*
*         Driver initialization
*
EXTH_EH_INIT    EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_INIT
*
*         Interrupt service routine
*
EXTH_EH_ISR     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_ISR
*
*         HPIB DMA transfer termination routine
*
EXTH_EH_TDMA    EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_DMATERM
*
*         Read a byte
*
EXTH_EH_RDB     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get VAR address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BSR     H_RDB         call read byte
	  MOVE.B  D0,(A3)       save character
	  RTS
*
*         Write a byte
*
EXTH_EH_WTB     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVE.B  (SP)+,D0      get value           ( this actually bumps SP by 2 )
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_WTB         call write byte
*
*         Read a word
*
EXTH_EH_RDW     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get VAR address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BSR     H_RDB         call read byte
	  MOVE.B  D0,D5         save byte
	  BSR     H_RDB         read second byte
	  LSL.W   #8,D5         shift first by
	  MOVE.B  D0,D5         bring in low bits
	  MOVE.W  D5,(A3)       save word
	  RTS
*
*         Write a word
*
EXTH_EH_WTW     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVE.W  (SP)+,D0      get word value
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  MOVE.B  D0,D5         save second byte
	  LSR     #8,D0
	  BSR     H_WTB         write the byte
	  MOVE.B  D5,D0         get the second byte
	  BRA     H_WTB         write the byte
*
*         Read status
*
EXTH_EH_RDS     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get VAR address
	  MOVE.W  (SP)+,D1      get register number
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BSR     H_RDS         read status
	  MOVE.W  D0,(A3)       save status info
	  RTS
*
*         Write control
*
EXTH_EH_WTC     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVE.W  (SP)+,D0      get value
	  MOVE.W  (SP)+,D1      get register number
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_WTC         write control
*
*         Transfer
*
EXTH_EH_TFR     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get buffer control block address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_TFR         transfer
*
*         Send an 'ATN' true command
*
EXTH_EH_SEND    EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVE.B  (SP)+,D0      get value          ( this actually bumps SP by 2 )
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_R6OUT       send command byte
*
*         Perform a Parallel Poll
*
EXTH_EH_PPOLL   EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get VAR address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BSR     H_P_POLL      do a parallel poll
	  MOVE.B  D0,(A3)       save value
	  RTS
*
*         Set an HPIB line
*
EXTH_EH_SET     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVE.W  (SP)+,D1      get line           ( this actually bumps SP by 2 )
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_SET         call set line
*
*         Clear an HPIB line
*
EXTH_EH_CLR     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVE.W  (SP)+,D1      get line           ( this actually bumps SP by 2 )
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BRA     H_CLR         clear the line
*
*         Test an HPIB line
*
EXTH_EH_TEST    EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get VAR address
	  MOVE.W  (SP)+,D1      get line           ( this actually bumps SP by 2 )
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  BSR     H_TEST        read status
	  MOVE.B  D0,(A3)       save character
	  RTS
*
*         Test for EOI/END condition
*
EXTH_EH_END     EQU *
	  MOVEA.L (SP)+,A0      get return address
	  MOVEA.L (SP)+,A3      get VAR address
	  MOVEA.L (SP)+,A2      get temp address
	  MOVEA.L C_ADR(A2),A1  get card address
	  PEA     (A0)          push return address back on stack
	  MOVE.B  H_STAT3(A2),D0 get EOR bit
	  ANDI.B  #1,D0         mask it off
	  MOVE.B  D0,(A3)       save condition
	  RTS
	  TTL IOLIB EXTH - HPIB CARD DECLARATIONS
	  PAGE
********************************************************************************
*
*       ADDRESS CONSTANTS
*
********************************************************************************
H_INT_CA    EQU $478000         address of internal HP-IB card
	    SPC 4
********************************************************************************
*
*       HP-IB CARD ADDRESS EQUATES  ( OFFSETS FROM A1 )
*
*           for the TI 9914
*
*           HPL DECLARATIONS
*
********************************************************************************
H_EXTSTAT   EQU $05   READ      EXTERNAL STATUS REGISTER
H_INT0STAT  EQU $11   READ      INTERRUPT STATUS REGISTER 0
H_INT0MASK  EQU $11   WRITE     INTERRUPT MASK REGISTER 0
H_INT1STAT  EQU $13   READ      INTERRUPT STATUS REGISTER 1
H_INT1MASK  EQU $13   WRITE     INTERRUPT MASK REGISTER 1
H_ADRSSTAT  EQU $15   READ      ADDRESS STATUS REGISTER
H_BUSSTAT   EQU $17   READ      BUS STATUS REGISTER
H_AUXCMD    EQU $17   WRITE     AUXILLARY COMMAND REGISTER
H_ADDRESS   EQU $19   WRITE     ADDRESS REGISTER
H_SPOLL     EQU $1B   WRITE     SERIAL POLL RESPONSE REGISTER
H_CMDPASS   EQU $1D   READ      COMMAND PASS THROUGH REGISTER
H_PPOLL     EQU $1D   WRITE     PARALLEL RESPONSE REGISTER
H_DATAIN    EQU $1F   READ      DATA IN REGISTER
H_DATAOUT   EQU $1F   WRITE     DATA OUT REGISTER
	    PAGE
********************************************************************************
*
*       HP-IB AUXILLARY COMMAND EQUATES
*
*           for the TI 9914
*
*           HPL DECLARATIONS
*
********************************************************************************
H_SWRST0    EQU $00   FALSE     SOFTWARE RESET
H_SWRST1    EQU $80   TRUE          "      "
H_DACR0     EQU $01   FALSE     RELEASE DAC HOLDOFF
H_DACR1     EQU $81   TRUE         "     "     "
H_RHDF      EQU $02   PULSE     RELEASE RFD HOLDOFF
H_HDFA0     EQU $03   FALSE     HOLDOFF ON ALL DATA
H_HDFA1     EQU $83   TRUE         "     "  "   "
H_HDFE0     EQU $04   FALSE     HOLDOFF ON END
H_HDFE1     EQU $84   TRUE         "     "  "
H_NBAF      EQU $05   PULSE     SET NEW BYTE AVAILABLE
H_FGET0     EQU $06   FALSE     FORCE GROUP EXECUTE TRIGGER
H_FGET1     EQU $86   TRUE        "     "      "       "
H_RTL0      EQU $07   FALSE     RETURN TO LOCAL
H_RTL1      EQU $87   TRUE         "    "   "
H_FEOI      EQU $08   PULSE     FORCE EOI
H_LON0      EQU $09   FALSE     LISTEN ONLY
H_LON1      EQU $89   TRUE        "     "
H_TON0      EQU $0A   FALSE     TALK ONLY
H_TON1      EQU $8A   TRUE       "    "
H_GTS       EQU $0B   PULSE     GO TO STANBY
H_TCA       EQU $0C   PULSE     TAKE CONTROL ASYNCHRONOUSLY
H_TCS       EQU $0D   PULSE     TAKE CONTROL SYNCHRONOUSLY
H_RPP0      EQU $0E   FALSE     REQUEST PARALLEL POLL
H_RPP1      EQU $8E   TRUE         "        "     "
H_SIC0      EQU $0F   FALSE     SEND IFC
H_SIC1      EQU $8F   TRUE        "   "
H_SRE0      EQU $10   FALSE     SEND REN
H_SRE1      EQU $90   TRUE        "   "
H_RQC       EQU $11   PULSE     REQUEST CONTROL
H_RLC       EQU $12   PULSE     RELEASE CONTROL
H_DAI0      EQU $13   FALSE     DISABLE ALL INTERRUPTS
H_DAI1      EQU $93   TRUE         "     "       "
H_PTS       EQU $14   PULSE     PASS THROUGH NEXT SECONDARY
H_STDL0     EQU $15   FALSE     SET T1 DELAY (1200ns)
H_STDL1     EQU $95   TRUE       "  "    "
H_SHDW0     EQU $16   FALSE     SHADOW HANDSHAKE
H_SHDW1     EQU $96   TRUE         "       "
H_VSTDL0    EQU $17   FALSE     SPECIAL SET T1 DELAY FOR 9914A (600ns)
H_VSTDL1    EQU $97   TRUE       "  "    "
	    PAGE
********************************************************************************
*
*       HP-IB command equates
*
*           PASCAL DECLARATIONS
*
********************************************************************************
GTL         EQU  1              go to local
SDC         EQU  4              selective device clear
PPC         EQU  5              ppoll configure
GET         EQU  8              group execute trigger
TCT         EQU  9              take control
LLO         EQU  17             local lockout
DCL         EQU  20             device clear
PPU         EQU  21             ppoll unconfigure
SPE         EQU  24             spoll enable
SPD         EQU  25             spoll disable
UNL         EQU  63             unlisten
UNT         EQU  95             untalk
PPE         EQU  96             ppoll enable
PPD         EQU  112            ppoll disable
	    TTL IOLIB EXTH - HPIB DRIVERS
	    PAGE

*                                                               wuwu TM 1/19/83
* SET THE PROCESSOR INTERRUPT LEVEL TO THE INTERFACE            wuwu TM 1/19/83
*         CARD'S INTERRUPT LEVEL                                wuwu TM 1/19/83
*                                                               wuwu TM 1/19/83
*       A1 MUST HAVE THE CARD ADDRESS                           wuwu TM 1/19/83
*                                                               wuwu TM 1/19/83
SET_INT_LEVEL   MOVEQ   #0,D0                                   wuwu TM 1/19/83
		CMPA.L  #$478000,A1     THIS THE INTERNAL HPIB?
		BEQ.S   INTLEV_1        BRANCH IF SO
		MOVEQ   #$30,D0         CARD'S INTERRUPT LEVEL MASK
		AND.B   3(A1),D0        INTERRUPT LEVEL IN UPPER NIBBLE
		LSR     #4,D0           SHIFT TO LOWER NIBBLE
INTLEV_1        ADDQ    #3,D0           CONVERT TO PROCESSOR'S INTERRUPT LEVEL
		LSL     #8,D0           SHIFT TO UPPER BYTE
		MOVE    D0,-(SP)        SAVE FOR A MOMENT
		MOVE    SR,D0           CURRENT STATUS REGISTER
		ANDI    #$F8FF,D0       STRIP CURRENT INT LEVEL BITS
		OR      (SP)+,D0        SUBSTITUTE NEW INT LEVEL BITS
		MOVE    D0,SR           SET NEW INTERRUPT LEVEL
		RTS                                             wuwu TM 1/19/83
		PAGE
********************************************************************************
*
*       H_INIT
*
*         INITIALIZE AN HP-IB CARD
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
H_INIT    EQU    *
* tm      MOVE.B MA(A2),D0              ASSUME THIS IS NOT POWER UP AND
	  MOVE.W #21,D0                 ASSUME THIS IS THE INTERNAL CARD
	  BTST   #7,H_EXTSTAT(A1)       SO CHOOSE ADDRESS 21 IF THIS
	  BNE.S  H_INIT_C               IS SYSTEM CONTROLLER ELSE
	  MOVE.W #20,D0                 CHOOSE ADDRESS 20.
H_INIT_C  CMPA.L #H_INT_CA,A1           IS THIS THE INTERNAL CARD?
	  BEQ.S  H_INIT0                IF SO, SKIP
	  MOVE.B H_EXTSTAT(A1),D0       ELSE GET ADDRESS FROM CARD
	  AND    #$1F,D0
	  CMP    #31,D0                 IF CARD SAYS IT IS AT ADDRESS
	  BNE.S  H_INIT0                31, THEN USE ZERO INSTEAD!
	   MOVEQ #0,D0
H_INIT0   MOVE.B #H_SRE0,H_AUXCMD(A1)   set REN false
	  BSR.S  H_INIT_S               START SOFTWARE RESET
	  BNE    H_IFC                  IF SYSTEM CONTROLLER, BRANCH
	  RTS
********************************************************************************
*
*       H_INT_S
*
*         SUBROUTINE USED FOR BOTH  INITIALIZATION AND wtc:
*
*         HPL ROUTINE
*
********************************************************************************
H_INIT_S  MOVE.B #H_SWRST1,H_AUXCMD(A1) START SOFTWARE RESET
	  MOVE.W D0,MA_W(A2)            SAVE MY ADDRESS
	  MOVE.B D0,H_ADDRESS(A1)       AND TELL CARD MY ADDRESS
	  JSR    ABORT_IO               CLEANUP ANY ATTACHED BUFFER
	  LEA    H_AUXCMD(A1),A0        MAKE A0 POINT TO AUX CMD REG
	  MOVEQ  #0,D0                  AND PRELOAD D0 WITH A ZERO
	  MOVE.B #H_STDL1,(A0)          SET T1 DELAY (1200NS)
	  MOVE.B #H_VSTDL1,(A0)         SET T1 DELAY FOR 9914A (600NS)
	  MOVEP  D0,H_INT0MASK(A1)      FOR NOW, CLEAR BOTH INT MASKS
	  MOVE.W D0,H_INT0COPY(A2)      CLEAR COPYS OF INT STAT REGS
	  MOVE.W D0,H_STAT3(A2)         INIT. DRIVER FLAGS
	  MOVE.B #H_HDFA1,(A0)          SET HOLD OFF ON ALL DATA
	  MOVE.B #H_HDFE0,(A0)          CLEAR HOLD OFF ON END
	  MOVE.B #H_RPP0,(A0)           CLEAR PAR. POLL IF ACTIVE.
	  MOVE.B D0,H_SPOLL(A1)         CLEAR SERIAL POLL RESPONSE
	  MOVE.B D0,H_PPOLL(A1)         UNCONFIGURE PARALLEL POLL
	  MOVE.W D0,H_PPOLLMSK(A2)      CLEAR PPOLL MASK
	  MOVE.B #H_SWRST0,(A0)         CLEAR SOFTWARE RESET
* tm      MOVEQ  #0,D0                  SET UP INT MASKS
	  BSR    H_EIR
	  MOVE.B #$80,3(A1)             ENABLE THE CARD       ( hphp TM 1/19/83 )
	  BTST   #7,H_EXTSTAT(A1)       IS THIS A SYSTEM CONTROLLER?
	  RTS                           (LEAVE CC FOR CALLER)
	  PAGE
********************************************************************************
*
*       H_RDB
*
*         READ A BYTE OF DATA FROM HP-IB
*
*         EXIT:   D0.B = BYTE READ
*
*         HPL ROUTINE
*
********************************************************************************
H_RDB     MOVE.B #H_GTS,H_AUXCMD(A1)    CLEAR ATN
	  BTST   #2,H_ADRSSTAT(A1)      MAKE SURE ADDRESSED TO LISTEN
	  BEQ.S  H_LSTERR               ELSE GIVE ERROR
H_RDB0    BCLR   #7,H_FLAGS(A2)         TEST (AND CLEAR) HOLDOFF FLAG
	  BEQ.S  H_RDB1                 IF IT WAS CLEAR, SKIP
	  BCLR   #0,H_STAT3(A2)         CLEAR EOR ( EOI ) FLAG IN TEMPS
	  MOVE.B #H_RHDF,H_AUXCMD(A1)   RELEASE RFD HOLDOFF TO START HS
H_RDB1    BSR    H_WAIT_BI              NOW WAIT FOR BYTE IN
	  MOVEQ  #0,D0                  ELSE CLEAR UPPER PART OF D0
	  MOVE.B H_DATAOUT(A1),D0       AND PUT DATA IN LOWER BYTE
	  RTS                           DONE!
	  SPC    6
********************************************************************************
*
*       H_WTB
*
*         WRITE A BYTE OF DATA TO HP-IB
*
*         ENTRY:  D0.B = BYTE TO WRITE
*
*         HPL ROUTINE
*
********************************************************************************
H_WTB     BTST   #1,H_ADRSSTAT(A1)      MAKE SURE ADDRESSED TO TALK
	  BEQ.S  H_TLKERR               ELSE ERROR
H_WTB0    MOVE.B #H_GTS,H_AUXCMD(A1)    CLEAR ATN
H_WTB1    BSR    H_WAIT_BO              WAIT FOR BYTE OUT
	  MOVE.B D0,H_DATAOUT(A1)       MOVE THE DATA OUT
	  RTS                           DONE!
	  SPC    4
	  TTL IOLIB EXTH - ERROR ESCAPES
	  PAGE
********************************************************************************
*
*       Error escapes
*
********************************************************************************
H_SCBSY   MOVEQ  #SC_BUSY,D0            buffer is busy
	  BRA.S  ESC_ERR
H_SC_ERR  MOVEQ  #BAD_SCT,D0            bad set/clear/test
	  BRA.S  ESC_ERR
H_NOTACTL MOVEQ  #NO_ACTL,D0            not active controller
	  BRA.S  ESC_ERR
H_NOTSCTL MOVEQ  #NO_SCTL,D0            not system controller
	  BRA.S  ESC_ERR
HTERR_B   MOVEQ  #TFR_ERR,D0            bad transfer specification
	  BRA.S  ESC_ERR
HTERR_D   MOVEQ  #NO_DMA,D0             DMA not installed
	  BRA.S  ESC_ERR
H_NOWORD  MOVEQ  #NO_WORD,D0            WORD transfers not allowed
	  BRA.S  ESC_ERR
H_LSTERR  MOVEQ  #NOT_LSTN,D0           not addressed as listener
	  BRA.S  ESC_ERR
H_TLKERR  MOVEQ  #NOT_TALK,D0           not addressed as talker
	  BRA.S  ESC_ERR
H_TMO     MOVEQ  #TMO_ERR,D0            timeout
*         BRA.S  ESC_ERR
	  SPC    4
ESC_ERR   EXT.L  D0
	  MOVE.L D0,IOE_RSLT(A5)          save error in io space
	  MOVE.B IO_SC(A2),D0           \ get sc for error
	  MOVE.L D0,IOE_SC(A5)          /
	  MOVE.W #IOE_ERROR,ESC_CODE(A5)  save system esc code
	  TRAP   #10                      escape
	  PAGE
********************************************************************************
*
*       HP-IB WAIT ROUTINES
*
*
*         ENTRY:  H_WAIT_BO      WAIT FOR BO STATUS TO BE TRUE
*                 H_WAIT_BI      WAIT FOR BI STATUS TO BE TRUE
*
*         EXIT:   IF CONDITION IS OR COMES TRUE, RTS.
*                 THE ERROR ESCAPE IS GENERATED
*                   IF TIMEOUT > 0  AND <TIMEOUT> MS HAS EXPIRED, OR
*
*         NOTE:   DURING THE FIRST 1-2 MS OF THE WAIT, A QUICK CHECK ALGORITHM IS
*                 USED WHICH DOES NOT CHECK THE TIMEOUT - THUS IF
*                 THE DATA RATE IS > 1 KB, NO TIMEOUT DETECTION OVERHEAD OCCURS.
*
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
H_WAIT_BO MOVE.L #254,D2                D2 = QUICK CHECK LOOP COUNTER
*
*  Quick check counter was 127, changed to 254    tttt  JS 8/1/83
*  ALSO CHANGED MOVEQ TO MOVE.L
*
H_WBO_1   MOVE.B H_INT0STAT(A1),D1      GET THE INTERRUPT STATUS
	  CMP    #$3F,D1                IF IN READING THE STATUS WE MISSED AN
	  BLS.S  H_WBO_2                AN INTERRUPT, THEN WE HAVE TO
	   BSR   H_FAKEISR              FAKE AISR CALL...DUMB HARDWARE!
	   MOVEQ #0,D1
H_WBO_2   OR.B   H_INT0COPY(A2),D1      THIS IS IN CASE ISR LEFT STUFF HERE
	  BTST   #4,D1                  BYTE OUT?
	  BNE.S  H_W_DONE               IF SO, GET OUT!
	  DBRA   D2,H_WBO_1             ELSE LOOP BACK
	  SPC    1
	  MOVE.L TIMEOUT(A2),D2         OK, SET UP TO WATCH FOR TIMEOUT,ETC
	  BEQ.S  H_WBO_5                  if =0 goto inf loop
	  BTST   #TIMER_PRESENT,SYSFLAG2  CHECK IF TIMER THERE  tttt JS 8/1/83
	  BEQ.S  H_WBOT                   YES, USE IT           tttt JS 8/1/83
* tm      MULU   #60,D2                 60 TIMES THROUGH LOOP = 1 MS
	  LSL.L  #6,D2                  ( * 64 IS CLOSE ENOUGH )
H_WBO_3   BSR    H_GETSTAT              GO GET STATUS
	  BTST   #4,D1                  BYTE OUT?
	  BNE.S  H_WAIT_D1              YES, GET OUT OF HERE!
	  SUBQ.L #1,D2                  LOOP UNTIL GRACE PERIOD DONE
	  BNE    H_WBO_3
	  BRA.S  H_TMO_ERR              GIVE ERROR
	  SPC 1
H_WBO_5   BSR    H_GETSTAT              ELSE TRY AGAIN FOR STATUS
	  BTST   #4,D1
	  BEQ    H_WBO_5                IF NOT SET, KEEP WAITING
	  SPC 1
H_W_DONE  OR.B   D1,H_INT0COPY(A2)      SAVE ANY STATUS BITS WE DIDN'T USE
H_WAIT_D1 ANDI.B #$CF,H_INT0COPY(A2)    CLEAR BO/BI BITS
	  BTST   #5,D1                  DID WE GET A BYTE IN?
	  BEQ.S  H_WAIT_D2              IF NOT, SKIP
	  BSET   #7,H_FLAGS(A2)         ELSE SET HOLDOFF FLAG
H_WAIT_D2 RTS                           DONE!
	  SPC 4
H_TMO_ERR OR.B   D1,H_INT0COPY(A2)      SAVE ANY STATUS BITS NOT USED.
	  BRA    H_TMO
H_WBOT    MOVE.B #1,-(SP)               SETUP TIMER RECORD   tttt JS 8/1/83
	  MOVE.L D2,-(SP)                                    tttt JS 8/1/83
H_WBOT1   BSR    H_GETSTAT              CHECK FOR BYTE OUT   tttt JS 8/1/83
	  BTST   #4,D1                  BO SET?              tttt JS 8/1/83
	  BNE.S  H_WBOT2                YES, GET OUT OF HERE tttt JS 8/1/83
	  PEA    (SP)                   ELSE CHECK TIMER     tttt JS 8/1/83
	  JSR    CHECK_TIMER                                 tttt JS 8/1/83
	  BPL    H_WBOT1                BR IF NOT TIMED OUT  tttt JS 8/1/83
	  ADDQ   #6,SP                  TIMEOUT, GIVE ONE    tttt JS 5/2/84
	  MOVEQ  #60,D2                 MORE CHANCE WITH     tttt JS 5/2/84
	  BRA    H_WBO_3                SHORT TIMEOUT        tttt JS 5/2/84
H_WBOT2   ADDQ   #6,SP                  CLEAN UP STACK       tttt JS 8/1/83
	  BRA    H_WAIT_D1              AND RETURN           tttt JS 8/1/83
	  SPC 4
H_WAIT_BI MOVE.L  #254,D2                D2 = QUICK CHECK LOOP COUNTER
*
* Quick timeout count was 127, changed to get 1 MS on 16 MHz processor
*    tttt  JS 8/1/83  ALSO CHANGED MOVEQ TO MOVE.L
*
H_WBI_1   MOVE.B H_INT0STAT(A1),D1      GET THE INTERRUPT STATUS
	  CMP    #$3F,D1                IF IN READING THE STATUS WE MISSED AN
	  BLS.S  H_WBI_2                AN INTERRUPT, THEN WE HAVE TO
	   BSR   H_FAKEISR              FAKE AISR CALL...DUMB HARDWARE!
	   MOVEQ #0,D1
H_WBI_2   OR.B   H_INT0COPY(A2),D1      THIS IS IN CASE ISR LEFT STUFF HERE
	  BTST   #5,D1                  BYTE IN?
	  BNE.S  H_W_DONE               IF SO, GET OUT!
	  DBRA   D2,H_WBI_1             ELSE LOOP BACK
	  SPC 1
	  MOVE.L TIMEOUT(A2),D2         OK, SET UP TO WATCH FOR TIMEOUT,ETC
	  BEQ.S  H_WBI_5                  if =0 goto inf loop
	  BTST   #TIMER_PRESENT,SYSFLAG2  CHECK FOR TIMER      tttt JS 8/1/83
	  BEQ.S  H_WBIT                   IF THERE USE IT      tttt JS 8/1/83
* tm      MULU   #60,D2                 60 TIMES THROUGH LOOP = 1 MS
	  LSL.L  #6,D2                  ( * 64 IS CLOSE ENOUGH )
H_WBI_3   BSR    H_GETSTAT              GO GET STATUS
	  BTST   #5,D1                  BYTE IN?
	  BNE.S  H_WAIT_D1              YES, GET OUT OF HERE!
	  SUBQ.L #1,D2                  LOOP UNTIL GRACE PERIOD DONE
	  BNE    H_WBI_3
	  BRA.S  H_TMO_ERR              IF SO, GIVE ERROR
	  SPC 1
H_WBI_5   BSR    H_GETSTAT              ELSE TRY AGAIN FOR STATUS
	  BTST   #5,D1
	  BNE    H_WAIT_D1              IF SET, GET OUT!
	  BRA    H_WBI_5
H_WBIT    MOVE.B #1,-(SP)               SET UP TIMER RECORD     tttt JS 8/1/83
	  MOVE.L D2,-(SP)                                       tttt JS 8/1/83
H_WBIT1   BSR    H_GETSTAT              GET STATUS              tttt JS 8/1/83
	  BTST   #5,D1                  CHECK FOR BI SET        tttt JS 8/1/83
	  BNE.S  H_WBIT2                IF GOTIT THEN EXIT      tttt JS 8/1/83
	  PEA    (SP)                   ELSE CHECK TIMER        tttt JS 8/1/83
	  JSR    CHECK_TIMER                                    tttt JS 8/1/83
	  BPL    H_WBIT1                BR IF NOT TIMED OUT     tttt JS 8/1/83
	  ADDQ   #6,SP                  TIMEOUT, GIVE ONE MORE  tttt JS 5/2/84
	  MOVEQ  #60,D2                 CHANCE WITH SHORT       tttt JS 5/2/84
	  BRA    H_WBI_3                TIMEOUT COUNT           tttt JS 5/2/84
H_WBIT2   ADDQ   #6,SP                  CLEAN UP TIMER RECORD   tttt JS 8/1/83
	  BRA    H_WAIT_D1              AND GET OUT             tttt JS 8/1/83
	  PAGE
********************************************************************************
*
*       H_GETSTAT
*
*         SUBROUTINE TO GET INT0STAT AND INSURE WE DON'T MISS AN
*             INTERRUPT
*
*         HPL ROUTINE
*
********************************************************************************
H_GETSTAT MOVE.B H_INT0STAT(A1),D1       GET CURRENT INTERRUPT STATUS
	  CMP.B  #$3F,D1                 DID WE MISS AN INTERRUPT?
	  BLS.S  H_G_STAT1               IF NOT, THEN DONE
	  BSR.S  H_FAKEISR               ELSE FAKE AN ISR CALL
	  MOVEQ  #0,D1                   AND JUST USE THE COPY
H_G_STAT1 OR.B   H_INT0COPY(A2),D1       INCLUDE ANY SAVED BITS
	  OR.B   D1,H_INT0COPY(A2)
	  RTS
	  SPC 3
********************************************************************************
*
*       H_FAKEISR
*
*         SUBROUTINE TO FAKE AN ISR IN CASE AN INPUT FROM INT0STAT
*             CAUSED HARDWARE TO MISS AN INTERRUPT.
*
*         ENTRY:  D1.B = INT0STAT(A1) WHICH CAUSED INTERRUPT
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
H_FAKEISR TRAP  #11                     GET INTO SUPERVISOR MODE        scs
* scs     MOVE    SR,-(SP)              PUT SR ON STACK FOR ISR'S RTE
	  MOVEM.L D0-D7/A0-A6,-(SP)     SAVE REGISTERS
	  OR.B    D1,H_INT0COPY(A2)     PUT BYTE WHERE ISR WILL SEE IT
	  BSR     SET_INT_LEVEL         DISABLE CARD INTRS      wuwu TM 1/19/83
	  JSR     H_ISR                 CALL ISR
	  MOVEM.L (SP)+,D0-D7/A0-A6     RESTORE REGISTERS
	  MOVE  (SP)+,SR                RESTORE USER MODE               scs
	  RTS                                                           scs
* scs     RTE                           Re-enable interrupts and get SR off stack
	  PAGE
********************************************************************************
*
*       H_RDS
*
*         READ STATUS
*
*         PASCAL ROUTINE
*
********************************************************************************
H_ROUTINE EQU    2
H_TEMP    EQU    1
H_CRDREG  EQU    0
*
*
H_RDS     LEA    H_RDSTBL,A0            get pointer to lookup table
	  ADD.W  D1,D1                  multiply the rds register by 2
	  CMP.B  #H_RT_SIZ,D1           \ check for out of bounds
	  BGE.S  RDS_ERR                /
	  MOVE.W 0(A0,D1),D0            get the table entry
	  BMI.S  RDS_ERR                if the entry is 0 then error
	  CMP.B  #H_TEMP,D0
	  BEQ.S  HR_TEMP
	  BLT.S  HR_CARD
	  LSR    #8,D0                  get the routine offset
	  BEQ.S  H_RDS_ID               -  status rtn 0 - card id
	  SUBQ   #1,D0
	  BEQ.S  H_RDS_CS               -  status 3 - ctrl status + address
	  SUBQ   #1,D0
	  BEQ.S  H_RDS_ST               -  status 6 - chip state
	  SUBQ   #1,D0
	  BEQ.S  H_RDS_LI               -  status 7 - bus lines
*         BRA.S  RDS_ERR                there are no more status 'routines'
	  SPC    2
RDS_ERR   MOVEQ  #BAD_RDS,D0            bad read status
	  BRA    ESC_ERR
	  SPC    2
*
*         retrieve temps as words
*
HR_TEMP   LSR    #8,D0                  get temp offset
	  MOVE.W 0(A2,D0),D0            get the value
	  RTS
	  SPC 3
*
*         retrieve card registers as bytes
*
HR_CARD   LSR    #8,D0                  get the card offset
HR_CARD1  MOVE.B 0(A1,D0),D0            get the value
	  ANDI.W #$00FF,D0              mask off garbage
	  RTS
	  SPC 3
*
*         card id
*
H_RDS_ID  MOVE.W #1,D0
* tm      CMPA.L #H_INT_CA,A1           is this the internal card ?
* tm      BNE.S  HR_CARD1
	  RTS
	  SPC    2
H_RDS_CS  MOVE.B H_EXTSTAT(A1),D0       get sys ctl and active ctl
	  BCHG   #6,D0                  complement NOT actv ctl
	  ANDI.W #$C0,D0                mask bits
	  ADD.B  MA(A2),D0              get my address
	  RTS
	  SPC    2
H_RDS_ST  BSR    H_RDS_CS               get sys/act ctl and address info
	  MOVE.B H_ADRSSTAT(A1),D1      get chip state
	  LSL    #8,D1
	  ADD.W  D1,D0                  put together in D0
	  RTS
	  SPC    2
H_RDS_LI  MOVE.B H_BUSSTAT(A1),D0       get bus lines
	  LSL    #8,D0
	  MOVE.B H_DATAIN(A1),D0        get data lines
	  RTS
	  SPC    4
H_RDSTBL  EQU    *
	  DC.B   0,H_ROUTINE            status 0 - routine  0   - card id
	  DC.B   3,H_CRDREG             status 1 - card reg 3   - intr/dma status
	  DC.B   99,H_ROUTINE           status 2 - not implemented
	  DC.B   1,H_ROUTINE            status 3 - status&addr  - sys & act ctl my addr
	  DC.B   H_INT0COPY,H_TEMP      status 4 - temps
	  DC.B   H_INTMSKSAV,H_TEMP     status 5 - temps
	  DC.B   2,H_ROUTINE            status 6 - card reg 21+ - state
	  DC.B   3,H_ROUTINE            status 7 - card reg 23  - bus state
	  DC.B   H_CMDPASS,H_CRDREG     status 8 - card reg     - command
H_RT_END  EQU    *
H_RT_SIZ  EQU    H_RT_END-H_RDSTBL      size of table
	  PAGE
********************************************************************************
*
*       H_WTC
*
*         WRITE CONTROL
*
*         ENTRY:  D0.W = PARAMETER
*
********************************************************************************
H_WTC     CMPI.W #6,D1                  \ check for ctl limits
	  BGE.S  RDS_ERR                /
	  EXT.L  D1
	  ADD.L  D1,D1
	  JMP    HWTCTBL(D1)
	  SPC    3
HWTCTBL   BRA.S  H_WTC_RST              CONTROL 0 - DO A RESET
	  BRA.S  H_RQS                  CONTROL 1 - set SRQ response
	  BRA.S  H_WTC_PPC              CONTROL 2 : ppoll configure
	  BRA.S  H_WTC_SMA              CONTROL 3 - set my addr
	  BRA.S  RDS_ERR                CONTROL 4 : not used
	  BRA.S  H_EIR                  CONTROL 5 : enable intrpts
	  SPC    5
********************************************************************************
*
*       HPL_WTC
*
*         WRITE CONTROL TO HP-IB ( alter my addr or set ppoll conf. )
*
*         ENTRY:  D0.W = PARAMETER
*
*         NOTE:   This command was illegal on a 9825.  On WILDFIRE, it is used
*                 to alter the HP-IB address of a given card and/or reset the
*                 card without generating IFC or locally configure the
*                 parallel poll response:
*
*                 wtc 7,20    will change address to 20 and reset card
*                 wtc 7,31    will reset the card without changing addr
*                 wtc 7,<configure byte>  will do PP configure.
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
HPL_WTC   CMP    #31,D0                 MAKE SURE PARM IS 0..31
	  BHI.S  HPL_WTC3               IF NOT, GO TO PPOLL CONFIGURE
HPL_WTC0  BNE.S  HPL_WTC1               IF PARM <31, THEN SKIP
	  SPC    2
H_WTC_RST EQU    *
	  MOVE.B MA(A2),D0              ELSE USE PREVIOUS ADDRESS
	  SPC    2
H_WTC_SMA EQU    *
HPL_WTC1  MOVE.B H_EXTSTAT(A1),-(SP)    SAVE CONTROLLER ACTIVE STATE.
	  BSR    H_INIT_S               DO SOFTWARE RESET
	  BTST   #6,(SP)+               WERE WE CONTROLLER?
	  BNE.S  HPL_WTC2               IF NOT, SKIP
	  MOVE.B #H_RQC,(A0)            ELSE REGAIN CONTROL
	  MOVE.B #H_GTS,(A0)            AND RE-DROP ATN
HPL_WTC2  RTS                           ELSE DONE
	  SPC    3
HPL_WTC3  MOVEQ  #0,D1                  COMPUTE THE TWO BYTE PPOLLMSK
	  BSET   D0,D1                  BASED ON CONFIGURATION IN D0.
	  MOVE.W D1,H_PPOLLMSK(A2)      SAVE THE MASK
	  BSR    HPL_WTC4               set response in 9914  ( SPR695 TM 4/21/82 )
	  RTS                                                 ( SPR695 TM 4/21/82 )
	  SPC    3
H_WTC_PPC EQU    *
	  MOVE.B D0,D1                  copy so HPL_WTC4 works( 564    TM 10/6/82 )
	  LSL.W  #8,D1                  \ duplicate in left   ( 564    TM 10/6/82 )
	  OR.B   D0,D1                  /  byte for rsv stuff ( 564    TM 10/6/82 )
	  CLR.W  H_PPOLLMSK(A2)         clear the mask        ( SPR695 TM 4/21/82 )
	  MOVE.W D1,H_PPOLLMSK(A2)      move new mask in temps( SPR695 TM 4/21/82 )
	  BSR    HPL_WTC4               set response in 9914  ( SPR695 TM 4/21/82 )
	  RTS
	  SPC    3
********************************************************************************
*
*       H_RQS
*
*         request service - set spoll response ( & SRQ )
*
*         NOTE : rsv is the Request SerVice bit.
*                On the 9825 this is tied to the
*                ist state ( individual status ).
*                In the IEEE 488 standard the rsv state is
*                the SRQ response and ist is the  PPOLL
*                response.  The standard does not
*                specify any relation between the
*                two.
*
*         PASCAL ROUTINE ( taken from HPL R7OUT )
*
********************************************************************************
H_RQS     BCLR   #6,H_FLAGS(A2)         ASSUME rsv = 0 IN THIS NEW BYTE
	  MOVE.B D0,D1                  IF rsv BIT IN THE NEW BYTE IS INDEED
	  BCLR   #6,D1                  ZERO, THEN JUST OUTPUT THE NEW BYTE.
	  BEQ.S  H_RQS2
	  MOVE.B D1,H_SPOLL(A1)         ELSE FIRST WRITE THE BYTE WITH rsv
	  BSET   #6,H_FLAGS(A2)         CLEAR. REMEMBER THAT rsv IS SET.
H_RQS2    MOVE.B D0,H_SPOLL(A1)         WRITE THE BYTE WITH rsv CORRECT.
	  MOVE.W H_PPOLLMSK(A2),D1      GO UPDATE THE PARALLEL POLL RESPONSE
HPL_WTC4  TRAP  #11                                                     scs
* scs     MOVE   SR,-(SP)               DISABLE ISR'S WHILE WE FIGURE
	  ORI    #$2700,SR              OUT WHICH MASK TO SET BASED ON
	  BTST   #6,H_FLAGS(A2)         CURRENT rsv BIT.
	  BEQ.S  HPL_WTC5               IF rsv = 0, USE RIGHT BYTE
	  ROR   #8,D1                  ELSE USE LEFT BYTE
HPL_WTC5  MOVE.B D1,H_PPOLL(A1)
	  MOVE  (SP)+,SR                                                scs
	  RTS                                                           scs
* scs     RTE                           RE-ENABLE ISR'S AND RETURN
	  PAGE
********************************************************************************
*
*       H_EIR
*
*         ENABLE THE HP-IB BASED ON 98034 ENABLE BYTE
*
*         ENTRY:  D0.B = EIR BYTE A LA 98034 CARD
*
*         EXIT:   EIR BYTE SAVED IN DRIVER TEMPS.
*                 EIR ACCOMPLISHED.  ANY CONDITIONS ALREADY TRUE GENERATE LOGIN.
*
*         USES:   D0, D1, D2
*
*         HPL ROUTINE
*
********************************************************************************
H_EIR     MOVE.B D0,EIRB_OFF(A2)        SAVE EIR BYTE
	  MOVE.B #H_DAI1,H_AUXCMD(A1)   DISABLE ALL INTS FOR A SEC
* tm      MOVE.B #$80,3(A1)             ENABLE THE CARD       ( hphp TM 1/19/83 )
	  MOVE.W #$CEAB,D1              D1 = INITIAL VALUE OF INTMSK
	  MOVE.W D0,D2                  EXTRACT IRF & ORE BITS FROM BYTE
	  AND    #$C,D2
	  LSL    #8,D2                  MOVE THESE BITS TO BI/BO POSITION
	  LSL    #2,D2
	  OR     D2,D1                  AND INCLUDE IN THE ENABLE MASK
	  MOVE.W D0,D2                  SAVE EIR BYTE IN D2 WHILE LOOKING FOR
	  AND    #$30,D0                EITHER TLK OR LST BITS ON?
	  BEQ.S  H_EIR2                 IF NOT, SKIP
	    ADD  #4,D1                  ELSE ENABLE MA TO INTERRUPT
H_EIR2    MOVE.W D1,H_INTMSKSAV(A2)     SAVE THIS MASK VALUE
	  MOVEP  D1,H_INT0MASK(A1)      GIVE MASK TO 9914
	  MOVE.B H_FLAGS(A2),D0         GENERATE IMMEDIATE INTERRUPT IF ANY
	  AND    #$3C,D0                OF THE 'OTHER' CONDITIONS ARE TRUE
	   BEQ.S H_EIR3
	   JSR   LOGINT
H_EIR3    BSR    H_CHKADDR              GENERATE ANY ADDRESS INTERRUPTS.
	  BSR    H_CHKSRQ               GENERATE SRQ INTERRUPT IF NECESSARY
	  MOVE.B H_INT0COPY(A2),D1      IF BI/BO IS ENABLED AND THE
	  AND.B  H_INTMSKSAV(A2),D1     BO/BI STATUS IS ALREADY TRUE,
	  AND.B  #$30,D1                THEN WE HAVE TO FAKE AN
	  BEQ.S  H_EIR4                 INTERRUPT.
	    BSR  H_FAKEISR
H_EIR4    MOVE.B #H_DAI0,H_AUXCMD(A1)   RENABLE ALL INTS FOR CARD
	  BCLR    #1,H_FLAGS(A2)        if isr pend then do it ( rrrr TM 12/17/82 )
	  BEQ.S   H_EIR5                   else just exit      ( rrrr TM 12/17/82 )
	  JSR     LOGINT                                       ( rrrr TM 12/17/82 )
H_EIR5    RTS                                                  ( rrrr TM 12/17/82 )
	  PAGE
********************************************************************************
*
*       H_ENABLE
*
*         ENABLE THE HP-IB FOR TRANSFER USES
*
*         ENTRY:  D0.W = 9914 ENABLE MASK ( TO BE INCLUSIVE OR'ED )
*                 ( D0 = #$2000  FOR BYTE IN  ( BI )
*                 ( D0 = #$1000  FOR BYTE OUT ( BO )
*
*         USES:   D0, D1
*
*         PASCAL ROUTINE        1/19/83
*
********************************************************************************
H_ENABLE  EQU   *
	  MOVE.B  #H_DAI1,H_AUXCMD(A1)  DISABLE THE CARD    ( hphp TM 1/19/83 )
	  OR.W    H_INTMSKSAV(A2),D0    OR NEW BITS IN      ( hphp TM 1/19/83 )
H_ED_COM  MOVE.W  D0,H_INTMSKSAV(A2)    AND RE-SAVE         ( hphp TM 1/19/83 )
	  MOVEP   D0,H_INT0MASK(A1)     AND GIVE TO CARD    ( hphp TM 1/19/83 )
	  MOVE.B  H_INT0COPY(A2),D1     IF BI/BO ENABLED &  ( hphp TM 1/19/83 )
	  AND.B   H_INTMSKSAV(A2),D1       IS ALREADY TRUE, ( hphp TM 1/19/83 )
	  AND.B   #$30,D1               THEN FAKE AN        ( hphp TM 1/19/83 )
	  BEQ.S   H_ED_EXIT             INTERRUPT.          ( hphp TM 1/19/83 )
	  BSR     H_FAKEISR                                 ( hphp TM 1/19/83 )
H_ED_EXIT MOVE.B  #H_DAI0,H_AUXCMD(A1)   RENABLE CARD       ( hphp TM 1/19/83 )
	  RTS                                               ( hphp TM 1/19/83 )
********************************************************************************
*
*       H_DISABLE
*
*         DISABLES BO AND BI ON THE HP-IB FOR TRANSFER USES
*
*         USES:   D0, D1
*
*         PASCAL ROUTINE        1/19/83
*
********************************************************************************
H_DISABLE EQU   *
	  MOVE.B  #H_DAI1,H_AUXCMD(A1)  DISABLE THE CARD    ( hphp TM 1/19/83 )
	  MOVE.W  H_INTMSKSAV(A2),D0    GET OLD MASK        ( hphp TM 1/19/83 )
	  ANDI.W  #$CFFF,D0             MASK OUT BO/BI      ( hphp TM 1/25/83 )
	  BRA.S   H_ED_COM              JUMP TO COMMON CODE ( hphp TM 1/19/83 )
	  PAGE
********************************************************************************
*
*       H_P_POLL
*
*         CONDUCT PARALLEL POLL
*
*         IF NOT ACTIVE CONTROLLER GIVE ERROR
*         ELSE VALUE RETURNED IN D0.B
*
*         HPL ROUTINE
*
********************************************************************************
H_P_POLL  BSR    H_SET_ATN              SET ATN LINE
	  BSR    H_WAIT_BO              WAIT FOR 'READY'
	  ORI.B  #16,H_INT0COPY(A2)     (SAVE BO STATUS FOR LATER)
	  MOVE.B #H_RPP1,H_AUXCMD(A1)   REQUEST THE PARALLEL POLL
*   JS    MOVEQ  #20,D0                 DELAY 40 US FOR LINES TO SETTLE
*   JS    DBRA   D0,*
	  MOVE.L #40,-(SP)              USE TIMER FOR DELAY   tttt JS 8/1/83
	  JSR    DELAY_TIMER                                  tttt JS 8/1/83
	  MOVEQ  #0,D0
	  MOVE.B H_CMDPASS(A1),D0       GET THE RESPONSE
	  MOVE.B #H_RPP0,H_AUXCMD(A1)   CLEAR PARALLEL POLL
	  MOVE.B #H_GTS,H_AUXCMD(A1)    CLEAR ATN
	  RTS
	  PAGE
********************************************************************************
*
*       H_SET
*
*         Set an HPIB line true
*
*         PASCAL ROUTINE
*
********************************************************************************
H_SET     CMP    #7,D1                  \
	  BHI    H_SC_ERR               /  make sure bit # is  <=7
	  ADD    D1,D1
	  LEA    H_S_TBL,A0             \
	  ADDA.W 0(A0,D1),A0             INDEXED JUMP THRU TABLE
	  JMP    (A0)                   /
*                             move h_s_tbl(d1),d1
*                             jmp  h_s_tbl(d1)
	  SPC    3
H_S_TBL   EQU    *
	  DC.W   H_REN-H_S_TBL          REN  - set REN
	  DC.W   H_IFC-H_S_TBL          IFC  - pulse IFC ( set REN/clr ATN )
	  DC.W   H_SC_ERR-H_S_TBL       SRQ  - error
	  DC.W   H_EOI-H_S_TBL          EOI  - pulse EOI on next byte out
	  DC.W   H_SC_ERR-H_S_TBL       NRFD - error
	  DC.W   H_SC_ERR-H_S_TBL       NDAC - error
	  DC.W   H_SC_ERR-H_S_TBL       DAV  - error
	  DC.W   H_SET_ATN-H_S_TBL      ATN  - set ATN true
	  SPC    3
********************************************************************************
*
*       H_REN
*
*         SET REN ON HP-IB
*
*         EXIT :   IF NOT SYSTEM CONTROLLER THEN GIVE ERROR
*
*         HPL ROUTINE
*
********************************************************************************
H_REN     BTST   #7,H_EXTSTAT(A1)
	  BEQ    H_NOTSCTL
	  BRA.S  H_IFC2
	  SPC 3
********************************************************************************
*
*       H_IFC
*
*         DRIVE IFC TRUE FOR 100 MICROSECONDS
*
*         ENTRY :   IF NOT SYSTEM CONTROLLER, CLEAR STS AND SET ERR
*
*         EXIT  :   ATN CLEARED
*                   REN SET
*
*         NOTE  :   IF THE 9914 IS NOT IN SOFTWARE RESET, THIS ROUTINE WILL
*                   DRIVE THE ATN LINE TRUE DURING THE IFC.
*
*         HPL ROUTINE
*
*
********************************************************************************
H_IFC     BTST   #7,H_EXTSTAT(A1)       MUST BE SYSTEM CONTROLLER
	  BEQ    H_NOTSCTL
	  MOVE.B #H_SIC1,H_AUXCMD(A1)   SET IFC
*   JS    MOVEQ  #70,D0                 SET DELAY COUNT
*   JS    DBRA   D0,*
	  MOVE.L #100,-(SP)             USE TIMER FOR DELAY  tttt JS 8/1/83
	  JSR    DELAY_TIMER                                 tttt JS 8/1/83
	  MOVE.B #H_SIC0,H_AUXCMD(A1)   CLEAR IFC
	  MOVE.B #H_GTS,H_AUXCMD(A1)    CLEAR ATN
H_IFC2    MOVE.B #H_SRE1,H_AUXCMD(A1)   SET REN
	  RTS
	  SPC    3
********************************************************************************
*
*       H_SET_ATN
*
*         ROUTINE TO SET ATN.
*
*         EXIT:   IF NOT CONTROLLER THEN GIVE ERROR
*                    ELSE IF ADDRESSED TO LISTEN AND HOLDOFF FLAG IS SET
*                    THEN DO TCS
*                 ELSE IF ADDRESSED TO TALK,
*                    THEN WAIT FOR BO STATUS AND DO TCA
*                 ELSE DO TCA
*
*         USES:   H_WAIT ROUTINE
*
*         HPL ROUTINE ( H_SET_ATN used to be H_ATN1 )
*                     ( H_SET_ATN was identical to H_ATN1
*                       except for error exits )
*
********************************************************************************
H_SET_ATN BTST   #6,H_EXTSTAT(A1)       BETTER BE CONTROLLER
	  BNE    H_NOTACTL              ELSE ERROR
H_ATN1A   MOVE.B H_ADRSSTAT(A1),D1      GET ADDRESSED STATUS
	  MOVEQ  #H_TCS,D2              ASSUME WE CAN DO TCS
	  BTST   #2,D1                  ARE WE A LISTENER?
	  BEQ.S  H_ATN1_0               IF NOT, SKIP
	  BTST   #7,H_FLAGS(A2)         TEST HOLDOFF FLAG
	  BNE.S  H_ATN1_3               IF IT WAS SET, USE THE TCS
	  BRA.S  H_ATN1_2               ELSE DO TCA
H_ATN1_0  BTST   #1,D1                  ARE WE A TALKER?
	  BEQ.S  H_ATN1_2               IF NOT, TAKE CONTROL ASYNC
H_ATN1_1  BSR    H_WAIT_BO              ELSE WAIT FOR BYTE OUT
	  ORI.B  #16,H_INT0COPY(A2)     (SAVE BO STATUS FOR LATER!)
H_ATN1_2  MOVEQ  #H_TCA,D2              DO TAKE CONTROL ASYNC
H_ATN1_3  MOVE.B D2,H_AUXCMD(A1)        TAKE CONTROL!
	  RTS
	  SPC    3
********************************************************************************
*
*       H_EOI
*
*         ROUTINE TO SET EOI ON THE NEXT BYTE OUT
*
*         test to see if 9914 waits -
*               if so - ok
*               if not- do wait ( HW... )
*
********************************************************************************
H_EOI     MOVE.B #H_FEOI,H_AUXCMD(A1)   SET EIO WITH NEXT BYTE
H_DMYRTS  RTS
	  PAGE
********************************************************************************
*
*       H_CLR
*
*         Set an HPIB line false
*
*         PASCAL ROUTINE
*
********************************************************************************
H_CLR     CMP    #7,D1                  \
	  BHI    H_SC_ERR               /  make sure bit # is  <=7
	  ADD.W  D1,D1
	  LEA    H_C_TBL,A0             \
	  ADDA.W 0(A0,D1),A0             INDEXED JUMP THRU TABLE
	  JMP    (A0)                   /
	  SPC    3

H_C_TBL   EQU    *
	  DC.W   H_LOCAL-H_C_TBL        REN  - clear REN
	  DC.W   H_DMYRTS-H_C_TBL       IFC  - nothing
	  DC.W   H_SC_ERR-H_C_TBL       SRQ  - error
	  DC.W   H_DMYRTS-H_C_TBL       EOI  - nothing
	  DC.W   H_SC_ERR-H_C_TBL       NRFD - error
	  DC.W   H_SC_ERR-H_C_TBL       NDAC - error
	  DC.W   H_SC_ERR-H_C_TBL       DAV  - error
	  DC.W   H_CLR_ATN-H_C_TBL      ATN  - clear ATN
	  SPC 3
********************************************************************************
*
*       H_LOCAL
*
*         CLEAR REN ON HP-IB
*
*         EXIT :   IF NOT SYSTEM CONTROLLER THEN GIVE ERROR
*
*         PASCAL ROUTINE
*
********************************************************************************
H_LOCAL   BTST   #7,H_EXTSTAT(A1)
	  BEQ    H_NOTSCTL
	  MOVE.B #H_SRE0,H_AUXCMD(A1)   CLEAR REN
	  RTS
	  SPC 3
********************************************************************************
*
*       H_CLR_ATN
*
*         CLEAR ATN ON HP-IB
*
*         EXIT :   IF NOT ACTIVE CONTROLLER THEN GIVE ERROR
*
*         PASCAL ROUTINE
*
********************************************************************************
H_CLR_ATN BTST   #6,H_EXTSTAT(A1)
	  BNE    H_NOTACTL
	  MOVE.B #H_GTS,H_AUXCMD(A1)    CLEAR ATN
	  RTS
	  SPC 3
	  PAGE
********************************************************************************
*
*       H_TEST
*
*         Get an HPIB line's state
*
*         ENTRY :       D1 = line parameter
*                            0 = REN
*                            1 = IFC
*                            2 = SRQ
*                            3 = EOI
*                            4 = NRFD
*                            5 = NDAC
*                            6 = DAV
*                            7 = ATN
*
*         PASCAL ROUTINE
*
********************************************************************************
H_TEST    MOVEQ #1,D0                   assume line is true
	  BTST   D1,H_BUSSTAT(A1)       test bus lines from 9914
	  BNE.S  H_TEST_EX              if line is set then return
	  CLR.W  D0                     else set false return
H_TEST_EX RTS
	  PAGE
********************************************************************************
*
*       H_R6OUT
*
*         EMULATION OF R6 OUT FOR HP-IB
*
*         ENTRY:  D0 = BYTE TO OUTPUT
*
*         EXIT:   IF NOT ACTIVE CONTROLLER, STS CLEARED AND ERROR BIT SET
*                 ELSE OPERATION IS DONE AND ANY ADDRESSING DECODED.
*
*         HPL ROUTINE ( MODIFIED )
*
*
********************************************************************************
H_R6OUT   JSR    WAIT_TFR               IF A TFR IS ACTIVE WAIT TILL IT ISN'T
	  BSR    H_SET_ATN              GO SET ATN OR GIVE STS ERROR
	  BSET   #0,H_FLAGS(A2)         SET PASS CONTROL FLAG
	  BSR    H_WTB1                 GO OUTPUT THE BYTE
	  AND    #$7F,D0                CLEAR MSB FOR COMPARISON
	  MOVE.B MA(A2),D2              GET MY ADDRESS
	  OR     #$20,D2                MAKE A LISTEN ADDRESS
* tm      MOVEQ  #H_LON1,D1             ASSUME LON COMMAND...
	  MOVE.B #H_LON1,D1
	  CMP.B  D2,D0                  MLA?
	  BEQ.S  H_R6OUT3               IF SO GO DO LON
	  EORI   #$60,D2                MAKE A TALK ADDRESS
* tm      MOVEQ  #H_TON1,D1             ASSUME TON COMMAND...
	  MOVE.B #H_TON1,D1
	  CMP.B  D2,D0                  MTA?
	  BEQ.S  H_R6OUT3               IF SO, GO DO TON
	  MOVEQ  #H_LON0,D1             ASSUME LON0 COMMAND
	  CMP.B  #UNL,D0                UNLISTEN?
	  BEQ.S  H_R6OUT3               IF SO, GO DO LON0
	  CMP.B  #TCT,D0                TAKE CONTROL?
	  BEQ.S  H_R6TCT                IF SO , SKIP to tct code
H_R6OUT2  AND    #$60,D0                OTHER TALK ADDRESS?
	  CMP.B  #$40,D0
	  BNE.S  H_R6OUT4               IF NOT, SKIP
	  MOVEQ  #H_TON0,D1             IF SO, SET UP FOR TON0
H_R6OUT3  MOVE.B D1,H_AUXCMD(A1)        IF SO, DO IT
H_R6OUT4  BCLR   #0,H_FLAGS(A2)         CLEAR PASS CONTROL FLAG
*
* Added for 68040 timing problem - delay just a little bit
* This timing value taken from another usage in this file
* Our test suite passes with a value of 5. I tried to get
* a spec value but I couldn't find one. This delay value
* may have to be increased in the future ... JWH 2/28/91
*

	  BTST   #3,SYSFLAG2      68040 only
	  BNE    just_leave       else same as before
	  MOVE.L #40,-(SP)        this time delay
	  JSR    DELAY_TIMER      worked with our test suite
just_leave  RTS                   JWH 2/28/91
	  SPC    3
H_R6TCT   BTST   #1,H_ADRSSTAT(A1)      ARE WE TALKER?
	  BNE.S  H_R6OUT4               IF SO, IGNORE TCT
	  BSR    H_WAIT_BO              IF NOT, THEN WAIT FOR BYTE OUT
	  MOVE.B #H_GTS,H_AUXCMD(A1)    AND drop atn
	  MOVE.B #H_RLC,H_AUXCMD(A1)    AND RELEASE CONTROL
HTCTLOOP  BTST   #6,H_EXTSTAT(A1)  (tm) \
	  BEQ    HTCTLOOP          (tm) / wait for non active ctl
	  RTS                      (tm) exit
	  PAGE
********************************************************************************
*
*       H_DMATERM
*
*         TERMINATION OF DMA TRANSFER
*
*         CALLED FROM DMA INTERRUPT SERVICE ROUTINE
*
*         DMA RESOURCE HAS ALREADY BEEN RELEASED
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
H_DMATERM BSR     SET_INT_LEVEL         DISABLE CARD INTRS      wuwu TM 1/19/83
*                                       this is okay - only called in ISR
	  JSR     DROPDMA               RELINQUISH DMA RESOURCE
	  MOVE.B  #$80,3(A1)            TURN OFF DMA ENABLE BITS( hphp TM 1/27/83 )
*                                       in the card.            ( hphp TM 1/27/83 )
	  JSR     ITXFR                 MAKE SURE THERE IS A TRANSFER ACTIVE
	  BEQ.S   HDMA_END              IF NOT, FORGET THE INTERRUPT
*                                       at this point
*                                       D4 has remaining count
*                                       D3 has intended
	  MOVE.L  D4,TCNT_OFF(A3)       update count
	  SUB.L   D4,D3                 put # bytes tfr'd into D3
	  TST.B   TDIR_OFF(A3)          WHAT DIRECTION OF TRANSFER?
	  BNE.S   H_DMATO               IF OUTPUT, SKIP
	  ADD.L   D3,TFIL_OFF(A3)       update fill pointer
	  MOVE.B  #H_HDFE0,H_AUXCMD(A1) ELSE CLEAR HOLD OFF ON END MODE
	  MOVE.B  #H_HDFA1,H_AUXCMD(A1) SET HOLD OFF ON ALL MODE
	  MOVE.W  #$2000,D0             PRESET ENABLE FOR BI    ( hphp TM 1/19/83 )
H_DMATI_1 MOVE.L  #1,TCNT_OFF(A3)       TRANSFER LAST BYTE UNDER INTERRUPT
	  BSR     H_ENABLE                                      ( hphp TM 1/19/83 )
	  BRA.S   HDMA_END
	  SPC     2
H_DMATO   ADD.L   D3,TEMP_OFF(A3)       update empty pointer
	  TST.B   TEND_OFF(A3)          IS EOI TAG SET?
	  BEQ.S   H_DMATO_1             IF NOT, TRANSFER IS DONE!
	  MOVE.W  #$1000,D0             SEND LAST BYTE BY INTR  ( hphp TM 1/19/83 )
	  BRA.S   H_DMATI_1
H_DMATO_1 JSR     STCLR                 CLEAR BUFFER BUSY BITS & LOG BRANCH
HDMA_END  RTS                           END OF SERVICE
	  TTL IOLIB EXTH - HPIB INTERRUPT SERVICE ROUTINE
	  PAGE
********************************************************************************
*
*       H_ISR
*
*         INTERRUPT SERVICE ROUTINE FOR HP-IB CARDS
*
*         ENTRY : A1,A2 are set up
*
*         The ISR will track down the buffer control block
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
H_ISR     EQU     *
	  BCLR    #1,H_FLAGS(A2)        clear user isr pending flag
	  MOVEP   H_INT0STAT(A1),D0     GET BOTH STATUS BYTES FROM 9914
	  BSR     H_ISR1                PROCESS THE INTERRUPTING CONDITION(S)
	  JSR     ITXFR                 GO SEE IF TRANSFER IS ACTIVE
	   BEQ.S  HISR_END              IF NOT, THEN WE ARE DONE.
	  CMP.B   #TT_BURST,D1          IF FRW IS ACTIVE, GO PROCESS IT
	  BEQ     H_FRW
	  CMP.B   #TT_INT,D1            IF INT THEN GO PROCESS IT
	  BEQ.S   H_BUF
	  CMP.B   #TT_DMA,D1            IF DMA
	  BEQ.S   H_ISRDMA
HISR_END  BCLR    #1,H_FLAGS(A2)        if isr pending then do it
	  BEQ.S   H_ISR_EX
	  JSR     LOGINT
H_ISR_EX  RTS                           otherwise return ( used for FAKEISR )
	  SPC 2
*
* DMA TRANSFER CLEANUP:
*
H_ISRDMA  CMPI.L  #1,D3                 IF COUNT IS = one  ,  THIS IS
	  BEQ.S   H_BUF                    THE EXTRA TFR BY INTERRUPT, SO SKIP
	  TST.B   TDIR_OFF(A3)          \
	  BNE.S   HISR_END              / IF OUTPUT, CAN'T BE EARLY TERM
	  TST.B   TEND_OFF(A3)          \
	  BEQ.S   HISR_END              / IF NO EOI TAG, CAN'T BE EARLY TERM
	  BTST    #11,D0                \
	  BEQ     HISR_END              / IF EOI NOT SET, CAN'T BE EARLY TERM
	  MOVE.B  #$80,3(A1)            ELSE IT IS EARLY DMA TERMINATION
	  MOVE.B  #H_HDFA1,H_AUXCMD(A1) SO DISABLE DMA, SET HOLD OFF ON
	  MOVE.B  #H_HDFE0,H_AUXCMD(A1) ALL, CLEAR HOLD OFF ON END.
	  BSET    #7,H_FLAGS(A2)        SET HOLDOFF INDICATOR
H_BYTTST  EQU     *                                             ( SPRxxx TM 6/14/82 )
	  BTST    #13-8,H_INT0COPY(A2)  test for byte in        ( SPRxxx TM 7/21/82 )
	  BEQ.S   H_NOBYTE                   if no byte - norm. ( SPRxxx TM 6/14/82 )
	  JSR     DROPDMA               free the dma channel    ( SPRxxx TM 6/14/82 )
*                                       D4 has remaining = 0    ( SPRxxx TM 6/14/82 )
*                                       D3 has intended         ( SPRxxx TM 6/14/82 )
	  MOVE.W  #$2000,D0             set bit #13 - byte in
	  ADD.L   D3,TFIL_OFF(A3)       update fill pointer     ( SPRxxx TM 6/14/82 )
	  MOVEA.L TFIL_OFF(A3),A0       get pointer to next     ( SPRxxx TM 6/14/82 )
*                                       byte in the buffer      ( SPRxxx TM 6/14/82 )
	  MOVEQ   #1,D3                 set count = 1           ( SPRxxx TM 6/14/82 )
	  BRA.S   H_BUFI                let intr tfr finish     ( SPRxxx TM 6/14/82 )
*
H_NOBYTE  JSR     DROPDMA               FREE THE DMA CHANNEL
*                                       D4 has remaining
*                                       D3 has intended
	  MOVE.L  D4,TCNT_OFF(A3)       put remaining into TCNT
	  SUB.L   D4,D3                 put # bytes tfr'd into D3
	  ADD.L   D3,TFIL_OFF(A3)       update the fill pointer based on actual
*                                              bytes tfr'd
	  JSR     STCLR                 MARK THE TFR DONE   AND LOG BRANCH
	  BRA     HISR_END              DONE!
	  SPC 2
*
* INTERRUPT TRANSFER PROCESSING:
*
H_BUF     TST.B   TDIR_OFF(A3)          WHICH DIRECTION TRANSFER?
	  BNE.S   H_BUFO                SKIP IF OUTPUT
	  SPC 2
*
* BUFFERED INPUT:
*
H_BUFI    BTST    #13,D0                IS BYTE IN SET?
	  BEQ     HISR_END                 IF NOT, DO NOTHING
	  MOVEQ   #0,D4                    ELSE GET THE BYTE
	  MOVE.B  H_DATAIN(A1),D4
	  BTST    #11,D0                IS EOI SET WITH THIS BYTE?
	  BNE.S   H_BUFI_0
	  BTST    #0,H_STAT3(A2)        is eor set
	  BEQ.S   H_BUFI_1                 IF NOT SKIP
H_BUFI_0  TST.B   TEND_OFF(A3)          SHOULD WE IGNORE EOI?
	  BEQ.S   H_BUFI_1              IF SO, SKIP
	  MOVE.W  D4,D2                    ELSE USE TRICK TO MAKE TFR QUIT.
*                                          - set term char to current char
H_BUFI_1  MOVE.B  D4,(A0)+              SAVE CHARACTER IN BUFFER
	  MOVE.L  A0,TFIL_OFF(A3)       AND SAVE NEW FILL PTR
	  SUBQ.L  #1,D3                 HAVE WE TRANSFERED ALL CHARS?
	  MOVE.L  D3,TCNT_OFF(A3)       SAVE TRANSFER COUNT...
	  BLE.S   H_TI_TERM                IF SO, SKIP
	  CMP.W   D4,D2                    ELSE TERMINATE ON CHARACTER?
	  BEQ.S   H_TI_TERM             IF SO, SKIP
	  MOVE.B  #H_RHDF,H_AUXCMD(A1)  RELEASE HOLDOFF FOR NEXT BYTE
	  BCLR    #0,H_STAT3(A2)        clear eor flag
H_BUF_NT  BRA     HISR_END              AND RETURN
	  SPC 2
*
* BUFFERED OUTPUT:
*
H_BUFO    BTST    #12,D0                IS BYTE OUT SET ?
	  BEQ     HISR_END              IF NOT, DO NOTHING.
	  SUBQ.L  #1,D3                 IS THIS THE LAST CHARACTER?
	  BNE.S   H_BUFO_1              IF NOT, SKIP
	  TST.B   TEND_OFF(A3)          SHOULD WE SET EOI?
	  BEQ.S   H_BUFO_1              IF NOT, SKIP
	   MOVE.B #H_FEOI,H_AUXCMD(A1)  ELSE SET EOI WITH THE LAST BYTE
H_BUFO_1  MOVE.B  (A0)+,H_DATAOUT(A1)   SEND THE BYTE
	  MOVE.L  A0,TEMP_OFF(A3)       AND SAVE NEW EMPTY PTR
	  MOVE.L  D3,TCNT_OFF(A3)       SAVE TRANSFER COUNT...
	  BGT.S   H_BUF_NT              NO...DON'T TERMINATE
	  BRA.S   H_TO_TERM             YES...TERMINATE THE TFR
	  SPC 2
*
* INT AND FRW TRANSFER TERMINATION
*
H_TI_TERM BSET    #7,H_FLAGS(A2)        SET HOLDOFF INDICATOR
H_TO_TERM EQU     *
* tm      MOVE.B  #0,D0                 DISABLE OTHER INTERRUPTS
* tm      BSR     H_EIR
	  BSR     H_DISABLE             DISABLE BO/BI INTRPTS   ( hphp TM 1/19/83 )
	  JSR     STCLR                 MARK THE BUFFER FINISHED
	  BRA     HISR_END              END OF ISR
	  PAGE
*
* FAST R/W TRANSFER PROCESSING:
*
H_FRW     ORI     #$2700,SR             DISABLE ALL OTHER INTS
*                                       the pascal system will re-enable&RTE
	  TST.B   TDIR_OFF(A3)          WHICH DIRECTION TRANSFER?
	  BNE.S   H_FRWO                SKIP IF OUTPUT
	  SPC 4
*
* FAST R/W INPUT:
*
H_FRI     MOVEQ   #0,D4                 PRESET UPPER BYTE TO 0
	  LSR     #8,D0                 REPOSITION REMAINING INT STAT BITS
	  BTST    #5,D0                 DO WE ALREADY HAVE BYTE IN?
	  BNE.S   H_FRWI_2A             IF SO, SKIP
H_FRWI_1  MOVE.B  H_INT0STAT(A1),D0     GET INTERRUPT STATUS
	  BEQ     H_FRWI_1              IF NOTHING, KEEP WAITING
	  BTST    #3,D0                 IS EOI SET?
	  BNE.S   H_FRWI_2              IF SO, GO PROCESS BI AND END
	  BTST    #5,D0                 IS BYTE IN SET?
	  BNE.S   H_FRWI_2A             IF SO, GO PROCESS IT
	  BSR.S   H_FRW_OTHER           ELSE PROCESS OTHER INTERRUPTS
	  BRA     H_FRWI_1              AND KEEP WAITING
H_FRWI_2  OR.B    H_INT0STAT(A1),D0     MAKE SURE WE GET THE BI BIT!
H_FRWI_2A MOVE.B  H_DATAIN(A1),D4       GET THE DATA BYTE
	  MOVE.B  D4,(A0)+              SAVE IT IN THE BUFFER
	  AND     #$5F,D0               CLEAR BI STAT AND CHECK FOR OTHERS
	  BEQ.S   H_FRWI_3              IF NO OTHER BITS SET, SKIP
	  BSR.S   H_FRW_OTHER           ELSE PROCESS THE OTHERS
	  BTST    #3+8,D0               WAS EOI SET?
	  BEQ.S   H_FRWI_3              IF NOT, SKIP
	  TST.B   TEND_OFF(A3)          SHOULD WE IGNORE EOI?
	  BEQ.S   H_FRWI_3              IF SO, SKIP
	   MOVE.W D4,D2                 ELSE USE TRICK TO MAKE TFR TERMINATE
	   BSET    #0,H_STAT3(A2)       SET EOR INDICATOR
H_FRWI_3  SUBQ.L  #1,D3                 DONE?
	  BLE     H_TBI_TRM             IF SO, GO QUIT
	  CMP.W   D4,D2                 DOES CHAR MATCH TERMINATION CHAR?
	  BEQ     H_TBI_TRM             IF SO, GO QUIT
	  MOVE.B  #H_RHDF,H_AUXCMD(A1)  ELSE ASK FOR ANOTHER BYTE
	  BRA     H_FRWI_1              AND GO WAIT FOR IT
	  SPC 2
H_FRW_OTHER MOVEM.L D1-D3,-(SP)           SAVE REGS FOR LATER
	  TAS     D0                    SET BIT 8 TO FORCE LOOK AT INT0STAT
	  BSR.S   H_ISR0                PROCESS OTHER INTERRUPTS
	  MOVEM.L (SP)+,D1-D3           RESTORE REGS FOR ANOTHER PASS
	  RTS
	  SPC 2
H_TBI_TRM MOVE.L  TCNT_OFF(A3),D4       get intended count
	  MOVE.L  D3,TCNT_OFF(A3)       D3 has bytes not finished
	  SUB.L   D3,D4                 D4 has bytes transfered
	  ADD.L   D4,TFIL_OFF(A3)       update fill pointer
	  BRA     H_TI_TERM             and finish
	  SPC 3
*
* FAST R/W OUTPUT:
*
H_FRWO    BTST    #12,D0                DO WE ALREADY HAVE BYTE OUT?
	  BNE.S   H_FRWO_2              IF SO, GET STARTED
H_FRWO_1  MOVE.B  H_INT0STAT(A1),D0     ELSE GET THE INTERRUPT STATUS
	  BEQ     H_FRWO_1              IF NOTHING, KEEP WATCHING
	  CMP.B   #$90,D0               IS IT BO?
	  BEQ.S   H_FRWO_2              IF SO, LETS GO!
	  BSR     H_FRW_OTHER           ELSE GO PROCESS OTHER INTERRUPTS
	  BTST    #12,D0                IS BO LEFT?
	  BEQ     H_FRWO_1              IF NOT, KEEP WATCHING
H_FRWO_2  CMP.L   #1,D3                 IS THIS THE LAST BYTE?
	  BNE.S   H_FRWO_3              IF NOT, SKIP
	  TST.B   TEND_OFF(A3)          SHOULD WE TAG WITH EOI?
	  BEQ.S   H_FRWO_3              IF NOT, SKIP
	   MOVE.B #H_FEOI,H_AUXCMD(A1)  ELSE TAG IT!
H_FRWO_3  MOVE.B  (A0)+,H_DATAOUT(A1)   OUTPUT A BYTE FROM THE BUFFER
	  SUBQ.L  #1,D3                 DONE?
	  BGT     H_FRWO_1              IF NOT, WATCH FOR BO AGAIN
	  MOVE.L  TCNT_OFF(A3),D3       \
	  ADD.L   D3,TEMP_OFF(A3)       /  update empty pointer
	  CLR.L   TCNT_OFF(A3)          clear the count
	  BRA     H_TO_TERM             ELSE WE ARE DONE!
	  PAGE
********************************************************************************
*
*       ISR0
*       ISR1
*
*         THE FOLLOWING ROUTINE DOES ALL THE GRUNT WORK FOR THE ISR. IT IS
*         SEPARATED OUT SO IT CAN BE CALLED FROM BACKGROUND.
*
*         ENTRY:  D0 CONTAINS BOTH 9914 STATUS BYTES.
*
*         THE FOLLOWING CONDITIONS, IF THEY ARE THE CAUSE OF THE INTERRUPT, WILL
*         BE PROCESSED:
*
*                 END:  SET EOR LATCH.
*                 SPAS: CLEAR rsv INDICATOR, CHANGE PPOLL RESPONSE.
*                 RLC:  IF ENABLED, LOG BRANCH. (ENHANCEMENT)
*                 GET:  SET LATCH. IF ENABLED, LOG EOL BRANCH.  (ENHANCEMENT)
*                 UCG:  IF TCT, THEN REQUEST 9914 BECOME CONTROLLER.
*                                    IF ENABLED, LOG EOL BRANCH.
*                       IF PPC, THEN TELL 9914 TO PASS THROUGH NEXT SECONDARY.
*                       IF PPD OR SECONDARY, DO PP CONFIGURING.
*                 DCAS: SET DCAS LATCH.
*                       ELSE IF ENABLED, LOG EOL BRANCH.
*                 MA:   IF T/L IS ENABLED AND TADS/LADS IS TRUE, LOG EOL BRANCH.
*                 SRQ:  LOG EOL BRANCH, DISABLE SRQ INTERRUPT.
*                 IFC:  SET IFC LATCH. IF ENABLED, LOG EOL BRANCH. (ENHANCEMENT)
*                 NOTE: BO AND BI ARE NOT PROCESSED!
*
*         EXIT:   D0 HAS LEFT OVER BITS OF INTERRUPT STATUS. THE 'END' BIT
*                 WILL BE PROCESSED BY THIS ROUTINE BUT NOT CLEARED. ALL OTHER
*                 BITS PROCESSED WILL BE CLEARED.
*
*         USES:   D0-D3
*
*         HPL ROUTINE
*
********************************************************************************
H_ISR0    LSL     #8,D0                 ALTERNATE ENTRY TO BUILD FULL STAT
	  OR.B    H_INT1STAT(A1),D0     WORD IF ONLY BYTE 0 WAS READ.
H_ISR1    OR      H_INT0COPY(A2),D0     INCLUDE ANY SAVED BITS
	  MOVE.W  D0,D3                 SAVE COPY OF INT STATUS
	  AND     H_INTMSKSAV(A2),D3    KEEP ONLY THE ENABLED BITS IN D3
	  MOVE.W  H_INTMSKSAV(A2),D1    TURN OFF THE ENABLED BITS IN D0
	  NOT     D1
	  AND     D1,D0
	  MOVE.W  D0,H_INT0COPY(A2)     SEND THESE BACK TO BACKGROUND
	  MOVE.B  EIRB_OFF(A2),D2       GET CURRENT EIR BYTE
*
* PROCESS INTERRUPT CAUSES FROM INT1STAT:
*
	  BCLR    #6+8,D3               ARE THERE ANY INT1 CAUSES?
	  BEQ     H_NO_INT1             IF NOT, SKIP
	  SPC 1
	  BCLR    #0,D3                 IFC INTERRUPT?
	  BEQ.S   H_NO_IFC              IF NOT, SKIP
	   BSET   #3,H_FLAGS(A2)        ELSE SET IFC LATCH
	   BSR    H_LOG                 GO LOG INTERRUPT IF ENABLED
	  SPC 1
H_NO_IFC  BCLR    #1,D3                 SRQ INTERRUPT?
	  BEQ.S   H_NO_SRQ              IF NOT, SKIP
	   BSR    H_CHKSRQ              ELSE GO PROCESS SRQ INTERRUPT
	  SPC 1
H_NO_SRQ  BCLR    #2,D3                 MA INTERRUPT?
	  BEQ.S   H_NO_MA
	   MOVE.B #H_DACR0,H_AUXCMD(A1) RELEASE DAC HOLDOFF
	   BSR    H_CHKADDR             GO SEE IF WE SHOULD INTERRUPT
	  SPC 1
H_NO_MA   BCLR    #3,D3                 DCL/SDC INTERRUPT?
	  BEQ.S   H_NO_DCL
	   MOVE.B #H_DACR0,H_AUXCMD(A1) RELEASE DAC HOLDOFF
	   BSET   #4,H_FLAGS(A2)        SET DCL LATCH
	   BTST   #1,D2                 OTHER INTERRUPTS ENABLED?
	   BEQ.S  H_NO_DCL              IF NOT, SKIP
	   BSR    H_LOG                 ELSE JUST LOG EOL BRANCH
	  SPC 1
H_NO_DCL  BCLR    #5,D3                 UNIDENTIFIED COMMAND INTERRUPT?
	  BEQ.S   H_NO_UCG
	   MOVE.B H_CMDPASS(A1),D0      GET THE COMMAND
	   MOVE.B #H_DACR0,H_AUXCMD(A1) RELEASE DAC HOLDOFF
	   AND    #$7F,D0               IGNORE PARITY ON COMMANDS
	   CMP.B  #TCT,D0               IS THIS TAKE CONTROL?
	   BNE.S  H_NO_TCT              IF NOT, SKIP
*
*       waiting in ISR
*
*       trial for tct fix  11/29/81      4:47 PM
*
* tm        BTST  #0,H_FLAGS(A2)        IF THE 68000 IS TRYING TO PCT FROM
* tm        BNE.S H_TCTW1               ANOTHER SELECTCODE, THEN SKIP
H_TCTW      MOVE.W #8191,D5             tttt JS 8/1/83
*
*     Count changed from 4095 to 8191 to allow for 16 MHz processors
*     This is really much more than enough since card only can respond
*     at 8 MHz rate.   tttt  JS 8/1/83
*
H_TCTWL     BTST  #5,H_ADRSSTAT(A1)     ELSE WAIT FOR ATN TO DROP
	    DBEQ  D5,H_TCTWL
H_TCTW1     MOVE.B #H_RQC,H_AUXCMD(A1)  REQUEST CONTROL FROM 9914
	    MOVE.B #H_GTS,H_AUXCMD(A1)  AND DROP ATN
	    BTST  #6,D2                 ENABLED TO INTERRUPT?
	    BEQ.S H_NO_TCT              IF NOT, SKIP
	    BSR   H_LOG                 ELSE LOG THE BRANCH
H_NO_TCT  CMP.B   #PPC,D0               PARALLEL POLL CONFIGURE?
	  BNE.S   H_NO_PPC              IF NOT, SKIP
	   MOVE.B #H_PTS,H_AUXCMD(A1)   ELSE PASS THRU NEXT SECONDARY
H_NO_PPC  CMP.B   #PPU,D0               PARALLEL POLL UNCONFIGURE?
	  BEQ.S   H_PPE                 IF SO, TREAT SAME AS PPE
	  CMP.B   #$60,D0               GENERAL SECONDARY?
	  BLT.S   H_NO_PPE              IF NOT, THEN NOT PPE/PPD
H_PPE      BSR    HPL_WTC3              ELSE GO SET PPOLL CONFIGURATION
H_NO_PPE   EQU    *                     PROCESS OTHER UCG VALUES HERE
	  SPC 1
H_NO_UCG  BCLR    #7,D3                 GET INTERRUPT?
	  BEQ.S   H_NO_GET              IF NOT, SKIP
	   MOVE.B #H_DACR0,H_AUXCMD(A1) ELSE RELEASE DAC HOLDOFF
	   BSET   #5,H_FLAGS(A2)        AND SET GET LATCH
	   BSR    H_LOG                 GO LOG INTERRUPT IF ENABLED
H_NO_GET   EQU    *                     PROCESS OTHER INT1 CAUSES HERE
*
* PROCESS INTERRUPT CAUSES FROM INT0STAT:
*
H_NO_INT1 BCLR    #7+8,D3               ARE THERE ANY INT0 CAUSES?
	  BEQ.S   H_NO_INT0             IF NOT, SKIP
	  SPC 1
	  BCLR    #1+8,D3               RLC INTERRUPT?
	  BEQ.S   H_NO_RLC              IF NOT SKIP
	   BSR    H_LOG                 GO LOG INTERRUPT IF ENABLED
	  SPC 1
H_NO_RLC  BCLR    #2+8,D3               SPAS INTERRUPT?
	  BEQ.S   H_NO_SPAS             IF NOT, SKIP
	   BCLR   #6,H_FLAGS(A2)        ELSE INDICATE rsv IS NOW 0
	   MOVE.B H_PPOLLMSK+1(A2),H_PPOLL(A1) AND UPDATE PPOLL
	  SPC 1
H_NO_SPAS BTST    #3+8,D3               END INTERRUPT?
	  BEQ.S   H_NO_END              IF NOT, SKIP
	  BSET    #0,H_STAT3(A2)           ELSE SET EOR LATCH
	  SPC 1
H_NO_END  EQU     *                     PROCESS OTHER INT0 CAUSES HERE
H_NO_INT0 MOVE.W  D3,D0                 PUT REMAINING INT BITS BACK INTO D0
	  RTS                           FOR CALLER.
	  TTL IOLIB EXTH - HPIB ISR SUPPORT ROUTINES
	  PAGE
********************************************************************************
*
*       H_CHKADDR
*
*         SUBROUTINE TO CHECK FOR ADDRESS INTERRUPT
*
*         ENTRY:  D2.B = EIR BYTE
*
*         IF THE TLK (LST) BIT OF THE EIR BYTE IS TRUE AND THE 9914
*         IS ADDRESSED AS TALKER (LISTENER), THEN LOG AN EOL BRANCH.
*
*         HPL ROUTINE
*
********************************************************************************
H_CHKADDR BTST   #5,D2                  INTERRUPT ON TALKER ENABLED (TLK)?
	  BEQ.S  H_CHKA1                IF NOT, SKIP
	   BTST  #1,H_ADRSSTAT(A1)      ARE WE TALKER?
	   BNE   H_LOG                  IF SO, GO LOG INTERRUPT
H_CHKA1   BTST   #4,D2                  INTERRUPT ON LISTEN ENABLED (LST)?
	  BEQ.S  H_CHKA2                IF NOT, SKIP
	   BTST  #2,H_ADRSSTAT(A1)      ARE WE LISTENER?
	   BNE   H_LOG                  IF SO, GO LOG INTERRUPT
H_CHKA2   RTS                           ELSE RETURN
********************************************************************************
*
*       H_CHKSRQ
*
*         SUBROUTINE TO CHECK FOR SRQ INTERRUPT
*
*         ENTRY:  EIRB_OFF(A2) HAS ENABLE MASK
*
*         IF WE ARE CONTROLLER AND SRQ IS SET AND BIT 7 OF ENABLE BYTE
*         IS SET THEN LOG EITHER A NORMAL SRQ INTERRUPT.
*
*         HPL ROUTINE
*
********************************************************************************
H_CHKSRQ  BTST   #6,H_EXTSTAT(A1)       ARE WE CONTROLLER?
	  BNE.S  H_CHKS2                IF NOT, DO NOTHING
	  BTST   #2,H_BUSSTAT(A1)       IS SRQ SET?
	  BEQ.S  H_CHKS2                IF NOT, DO NOTHING
	  BCLR   #7,EIRB_OFF(A2)        ARE WE ENABLED FOR SRQ?
	  BEQ.S  H_CHKS2                IF NOT, DO NOTHING
H_CHKS1    BSR   H_LOG                  ELSE DO NORMAL LOGING
H_CHKS2   RTS                           DONE CHECKING FOR SRQ
	  SPC    4
*
*       H_LOG    mark that an isr condition is
*                pending
*
H_LOG     BSET   #1,H_FLAGS(A2)         set condition
	  RTS
	  TTL IOLIB EXTH - HPIB TRANSFER
	  PAGE
********************************************************************************
*
*       H_TFR
*
*         DRIVER CALL FOR EXECUTION OF tfr STATEMENT
*
*         ENTRY:  CONDITIONS OTHER THAN NORMAL A1,A2 ARE:
*                 A3.L = POINTER TO TRANSFER INFORMATION
*
*         HPL ROUTINE ( MODIFIED BEYOND ALL RECOGNITION )
*
********************************************************************************
H_TFR     JSR    CHECK_TFR              wait for  tfr to finish ( timed )
	  MOVE.B #H_GTS,H_AUXCMD(A1)    MAKE SURE ATN IS FALSE
	  TST.B  T_BW_OFF(A3)           DON'T ALLOW WORD TRANSFERS
	  BNE    H_NOWORD
	  MOVE.L TCNT_OFF(A3),D0        GET COUNT
	  CLR.W  D1                     \
	  MOVE.B TUSR_OFF(A3),D1         \   COMPUTE OFFSET INTO JUMP TABLE
	  ADD.W  D1,D1                    \
	  JSR    TESTDMA                  /  BASED ON TFR TYPE AND DMA PRESENCE
	  BEQ.S  H_NODMA                 /
	  ADDI.W #20,D1                 /
H_NODMA   LEA    H_TBL,A0               \
	  ADDA.W 0(A0,D1),A0             INDEXED JUMP THRU TABLE
	  JMP    (A0)                   /
*
*         TRANSFER JUMP TABLE
*
*                               --------------------  DMA is not installed or available
H_TBL     DC.W   HTERR_B-H_TBL  serial  interrupt
	  DC.W   HTERR_D-H_TBL  serial  dma
	  DC.W   H_T_FHS-H_TBL  serial  fhs
	  DC.W   H_T_FHS-H_TBL  serial  fastest
	  DC.W   HTERR_B-H_TBL  serial  overlap
*                               --------------------
	  DC.W   H_T_INT-H_TBL  overlap interrupt
	  DC.W   HTERR_D-H_TBL  overlap dma
	  DC.W   H_T_BST-H_TBL  overlap fhs
	  DC.W   H_T_BST-H_TBL  overlap fastest
	  DC.W   H_T_INT-H_TBL  overlap overlap
*                               --------------------  DMA is installed
	  DC.W   HTERR_B-H_TBL  serial  interrupt
	  DC.W   H_T_DMA-H_TBL  serial  dma
	  DC.W   H_T_FHS-H_TBL  serial  fhs
	  DC.W   H_T_DMA-H_TBL  serial  fastest
	  DC.W   HTERR_B-H_TBL  serial  overlap
*                               --------------------
	  DC.W   H_T_INT-H_TBL  overlap interrupt
	  DC.W   H_T_DMA-H_TBL  overlap dma
	  DC.W   H_T_BST-H_TBL  overlap fhs
	  DC.W   H_T_DMA-H_TBL  overlap fastest
	  DC.W   H_T_DMA-H_TBL  overlap overlap
	  PAGE
*
*         Transfer DMA
*
H_T_DMA   CMP.L  #1,D0                  \ USE INTR IF COUNT=1 ON DMA
	  BEQ    H_T_INT                /
	  MOVE.B #TT_DMA,TACT_OFF(A3)   set tfr type to DMA
	  TST.B  TDIR_OFF(A3)           \ test for transfer direction
	  BNE    H_TOD                  /
*
*         Transfer Input Dma:
*
H_TID     EQU    *
* tm      MOVEQ  #0,D0                  DISABLE CARD INTRPTS      hphp TM 1/25/83
* tm      BSR    H_EIR                                            hphp TM 1/25/83
	  MOVE.B #H_DAI1,H_AUXCMD(A1)   disable hpib card       ( SPR740 TM 5/24/82 )
	  BTST   #6,H_EXTSTAT(A1)       ARE WE ACTIVE CONTROLLER?
	  BEQ.S  H_TID_0                IF SO, SKIP
*
*         non controller path
*
	  MOVE.B #TT_INT,TACT_OFF(A3)   fake tfr type as intr   ( SPR740 TM 5/24/82 )
	  MOVE.L TCNT_OFF(A3),D0        copy count so this works( qqqq   TM 12/16/82 )
	  JSR    STBSY                  set buf busy ( intr )   ( SPR740 TM 5/24/82 )
	  BSR    H_RHDF_S               OTHERWISE RELEASE HOLD OFF AND WAIT
	  BSR    H_WAIT_BI              AROUND FOR THE FIRST BYTE TO APPEAR.
	  BCLR   #7,H_FLAGS(A2)         INSURE WON'T RE RELEASE HOLDOFF
*
*         at this point BYTE IN is true.  IF EOI and EOI term     hphp   TM 1/26/83
*         are true then the tfr should be faked out as finished.  hphp   TM 1/26/83
*
	  BTST   #0,H_STAT3(A2)         \ is EOI set              hphp   TM 1/26/83
	  BEQ.S  H_TID_0                /                         hphp   TM 1/26/83
	  TST.B  TEND_OFF(A3)           \ is EOI term. enabled    hphp   TM 1/26/83
	  BEQ.S  H_TID_0                /                         hphp   TM 1/26/83
*
*         at this point - fake that the tfr is finished           hphp   TM 1/26/83
*
H_TID_F   JSR     ITXFR                 get appropriate ptrs.     hphp   TM 1/26/83
	  MOVE.B  H_DATAIN(A1),D4       get data byte             hphp   TM 1/26/83
	  MOVE.B  D4,(A0)+              SAVE CHARACTER IN BUFFER  hphp   TM 1/26/83
	  MOVE.L  A0,TFIL_OFF(A3)       AND SAVE NEW FILL PTR     hphp   TM 1/26/83
	  SUBQ.L  #1,D3                 we have TFR'D ALL CHARS   hphp   TM 1/26/83
	  MOVE.L  D3,TCNT_OFF(A3)       SAVE TRANSFER COUNT...    hphp   TM 1/26/83
	  BSET    #7,H_FLAGS(A2)        SET HOLDOFF INDICATOR     hphp   TM 1/26/83
	  JSR     STCLR                 MARK THE BUFFER FINISHED  hphp   TM 1/26/83
	  BRA.S   H_TID_E               if done then finished     hphp   TM 1/26/83
*
*         common controller/non-controller path
*
H_TID_0   EQU    *                                              ( SPR740 TM 5/28/82 )
	  MOVE.B #TT_DMA,TACT_OFF(A3)   restore type as DMA     ( SPR740 TM 5/24/82 )
	  MOVE.L TCNT_OFF(A3),D0        RESTORE D0
	  SUBQ.L #1,D0                  DMA CH SHOULD ONLY DO N-1 BYTES.
	  JSR    GETDMA                 TRY FOR DMA CHANNEL
	  MOVE.W D2,(A4)                ARM THE CHANNEL
	  BSR    HD_STBSY               SET BUFFER BUSY, ETC    ( SPR740 TM 5/24/82 )
	  TST.B  TEND_OFF(A3)           IF EOI TAG, THEN TELL   ( SPR740 TM 5/28/82 )
	  BEQ.S  H_TID_1                9914 TO HOLD OFF ON END ( SPR740 TM 5/28/82 )
	  MOVE.B #H_HDFE1,H_AUXCMD(A1)                          ( SPR740 TM 5/28/82 )
H_TID_1   MOVE.B #H_HDFA0,H_AUXCMD(A1)  TURN OFF HOLD OFF ON ALL
	  BSR.S  H_RHDF_S               DO RHDF IF NECESSARY
	  MOVE.B D3,3(A1)               ENABLE CARD FOR DMA
*
*         common exit for input DMA tfr
*
H_TID_E   EQU    *                                              ( SPR740 TM 5/28/82)
	  MOVE.B #H_DAI0,H_AUXCMD(A1)   enable hpib card        ( SPR740 TM 5/24/82 )
	  BRA.S  H_DMA_W                DONE
*
*         Transfer Output Dma:
*
H_TOD     TST.B  TEND_OFF(A3)           IF EOI TAG IS SET, THEN LET DMA
	  BEQ.S  H_TOD_1                   DO ONLY N-1 BYTES AND DO THE LAST
	  SUBQ.L #1,D0                     UNDER INTERRUPT
H_TOD_1   JSR    GETDMA                 GET A DMA CHANNEL
	  MOVE.W D2,(A4)                ARM THE CHANNEL
	  BSR    HD_STBSY               SET BUFFER BUSY, ETC
* tm      MOVEQ  #0,D0                  DISABLE USER INTERRUPTS   hphp TM 1/25/83
* tm      BSR    H_EIR                                            hphp TM 1/25/83
	  MOVE.B D3,3(A1)               ENABLE CARD FOR DMA
*
*       H_DMA_W                         IF SERIAL THEN WAIT FOR  COMPLETION
*
H_DMA_W   MOVE.B TUSR_OFF(A3),D4        \
	  CMP.B  #5,D4                   IS THE TRANSFER OVERLAP ?
	  BGE.S  H_DMA_W2               /
H_DMA_W1  CMPI.B #255,T_SC_OFF(A3)      IF NOT THEN WAIT TILL DONE
	  BNE.S  H_DMA_W1
H_DMA_W2  RTS
	  PAGE
*
*         Transfer INTERRUPT
*
H_T_INT   MOVE.B #TT_INT,TACT_OFF(A3)   set tfr type to INTERRUPT
	  BRA.S  H_T_BIC                go to common code
	  SPC    3
*
*         Transfer BURST ( intr on 1st byte FHS on rest )
*
H_T_BST   MOVE.B #TT_BURST,TACT_OFF(A3) set tfr type to BURST
*         BRA.S  H_T_BIC                go to common code
	  SPC    3
*
*         common interrupt and burst code
*
H_T_BIC   JSR    STBSY                  SET BUFFER BUSY, ETC
	  TST.B  TDIR_OFF(A3)           \ test for transfer direction
	  BNE.S  H_TOI                  /
*
*         Transfer Input Interrupt or Transfer Input Burst
*
H_TII     EQU    *
* tm      MOVEQ  #9,D0                  ENABLE CARD FOR BYTE IN
* tm      BSR    H_EIR
	  MOVE.W #$2000,D0              ENABLE CARD FOR BI  ( hphp TM 1/19/83 )
	  BSR    H_ENABLE                                   ( hphp TM 1/19/83 )
	  BSR.S  H_RHDF_S               should we release holdoff
	  BRA    H_DMA_W                see if tfr was serial - and wait
*                                       if it was
*
*
*
H_RHDF_S  BCLR   #7,H_FLAGS(A2)         SHOULD WE RELEASE HOLDOFF?
	  BEQ.S  H_RHDF_S1              IF NOT, SKIP
	  BCLR   #0,H_STAT3(A2)         clear eor flag
	  MOVE.B #H_RHDF,H_AUXCMD(A1)   ELSE DO IT
H_RHDF_S1 RTS
*
*         Transfer Output Interrupt or Transfer Output Burst
*
H_TOI     EQU    *
* tm      MOVEQ  #4,D0                  ENABLE FOR BYTE OUT
* tm      BSR    H_EIR
	  MOVE.W #$1000,D0              ENABLE CARD FOR BO  ( hphp TM 1/19/83 )
	  BSR    H_ENABLE                                   ( hphp TM 1/19/83 )
	  BRA    H_DMA_W                wait if serial
	  PAGE
******************************************************************************
*                             Transfer FHS                                   *
******************************************************************************
*
* WARNING: these FHS routines have been carefully optimized towards...
*   1. a close FHS coupling with Coyote (Greeley's new 913X Disc Controller)
*   2. efficient Series 200 to Series 200 transfers
*   3. efficient high-speed disc transfers
* While the inner loops can be tuned for higher-speed transfers with
* selected other devices, doing so will almost certainly compromise the
* above optimizations!  If you decide to optomize further, keep in mind
* that: 1) the internal and external HPIB's behave differently with the
* same FHS loop!!!, and 2) the 9914 & 9914A are programmed for different
* T1 delays!!!  Good Luck!
*                                               J Cowan

*
* special register assignments for the fast handshake transfer routines:
*
fhs_eoi_bit  equ d5              always set to 0 for the eoi bit test
fhs_BI_stat  equ d6              set to $20 for input  (int0stat w/ BI only)
fhs_BO_stat  equ d6              set to $10 for output (int0stat w/ BO only)
fhs_BI_bit   equ d7              set to 5 for input  (the BI bit number)
fhs_BO_bit   equ d7              set to 4 for output (the BO bit number)
fhs_int0stat equ a4              permanent pointer to the int0stat register
fhs_auxcmd   equ a5              permanent pointer to the auxcmd   register
fhs_datain   equ a6              permanent pointer to the datain   register
fhs_dataout  equ fhs_datain      permanent pointer to the dataout  register


H_T_FHS   MOVE.B #TT_FHS,TACT_OFF(A3)           set tfr type to FAST HANDSHAKE
	  JSR    STBSY                          make buffer busy
	  JSR    ITXFR                          set up pointers and registers

	  movem.l fhs_int0stat-fhs_datain,-(sp)
	  moveq   #0,fhs_eoi_bit
	  lea     h_int0stat(a1),fhs_int0stat
	  lea     h_auxcmd(a1),fhs_auxcmd
	  lea     h_datain(a1),fhs_datain

	  move.b  #h_dai1,(fhs_auxcmd)          disable all card interrupts!

	  TST.B  TDIR_OFF(A3)                   which transfer direction?
	  BNE    fto                            branch if output

	  BSR     H_RHDF_S                      input; release holdoff if necessary

	  moveq   #$20,fhs_BI_stat              int0stat with BI only
	  moveq   #5,fhs_BI_bit                 the BI bit number

	  TST    D2                             termination character specified?
	  BPL    fti                            branch if so
	  page
*
*         Transfer FHS in; NO termination character
*
	  move.b  #h_hdfa0,(fhs_auxcmd)         release holdoff on all
	  subq.l  #2,d3                         count-2!
	  bge.s   fti_nt_i1                     initial BI test (n-1 bytes loop)
	  bra.s   fti_nt_i2                     initial BI test (last byte loop)

*
* high-speed loop for n-1 bytes
*
fti_nt_w1 move.b  (fhs_int0stat),d1             get card status
	  beq     fti_nt_w1                     loop until we get something
	  cmp.b   d1,fhs_BI_stat                BI status only?
	  bne.s   fti_nt_s1                     if not, process other conditions
fti_nt_t1 move.b  (fhs_datain),(a0)+            transfer this data byte and request the next
	  dbra    d3,fti_nt_w1                  loop until lower count exhausted

	  clr     d3                            clear lower count word only
	  subq.l  #1,d3                         decrement the entire long count
	  bpl     fti_nt_w1                     loop until entire long count exhausted

*
* last byte handling
*
fti_nt_w2 move.b  (fhs_int0stat),d1             get card status
	  beq     fti_nt_w2                     loop until we get something
	  cmp.b   d1,fhs_BI_stat                BI status only?
	  beq.s   fti_nt_t2                     if so, transfer the byte
	  bsr.s   j_fakeisr                     otherwise, process the other conditions
fti_nt_i2 bclr    fhs_BI_bit,h_int0copy(a2)     see if BI was logged
	  beq     fti_nt_w2                     if not, keep waiting
fti_nt_t2 move.b  #h_hdfa1,(fhs_auxcmd)         set holdoff on all again
	  move.b  (fhs_datain),(a0)+            transfer the last data byte
	  addq.l  #1,d3                         correct remaining count
	  bra     h_tfi_trm                     go terminate

*
* special status handling: n-1 bytes loop
*
fti_nt_s1 bsr.s   j_fakeisr                     process the other conditions
fti_nt_i1 bclr    fhs_BI_bit,h_int0copy(a2)     BI logged?
	  beq     fti_nt_w1                     if not, keep testing status
	  btst    fhs_eoi_bit,h_stat3(a2)       BI logged; was EOI set?
	  beq.s   fti_nt_t1                     if not, go transfer the byte
	  tst.b   tend_off(a3)                  BI w/ EOI; should we terminate?
	  bne.s   fti_nt_t2                     if so, transfer the last byte
	  bclr    fhs_eoi_bit,h_stat3(a2)       otherwise, clear the eoi flag
	  bra     fti_nt_t1                     and continue transferring bytes

	  page
*
*         restoration of A5/6 required because fakeisr
*         can call a PASCAL user procedure
*
j_fakeisr movem.l (sp)+,fhs_int0stat-fhs_datain restore the dedicated registers
	  bsr     h_fakeisr
	  movem.l fhs_int0stat-fhs_datain,-(sp)
	  lea     h_int0stat(a1),fhs_int0stat
	  lea     h_auxcmd(a1),fhs_auxcmd
	  lea     h_datain(a1),fhs_datain
	  rts



*
*         Transfer FHS in; looking for a termination character
*
fti       moveq   #0,d4                         clear upper byte to enable word comparison
	  bra.s   fti_it                        make the initial BI test

fti_fi    bsr     j_fakeisr                     process the other conditions
fti_it    bclr    fhs_BI_bit,h_int0copy(a2)     see if BI was logged
	  bne.s   fti_BI                        branch if so

fti_wl    move.b  (fhs_int0stat),d1             get card status
	  beq     fti_wl                        keep trying until we get something
	  cmp.b   d1,fhs_BI_stat                BI status only?
	  bne.s   fti_fi                        if not, process other conditions

fti_BI    move.b  (fhs_datain),d4               get the data byte
	  move.b  d4,(a0)+                      save it in the buffer
	  btst    fhs_eoi_bit,h_stat3(a2)       was EOI set?
	  beq.s   fti_tc                        branch if not
	  tst.b   tend_off(a3)                  EOI was set; do we terminate?
	  beq.s   fti_ceoi                      branch if not
	    move.w  d4,d2                         else use trick to make tfr terminate
	    bra.s  fti_tc
fti_ceoi  bclr    fhs_eoi_bit,h_stat3(a2)       clear the eoi flag
fti_tc    subq.l  #1,d3                         termination count expired?
	  ble.s   h_tfi_trm                     branch if so
	  cmp.w   d4,d2                         termination character match?
	  beq.s   h_tfi_trm                     branch if so
	  move.b  #h_rhdf,(fhs_auxcmd)          else ask for another byte
	  bra     fti_wl                        and go wait for it

	  page
*
*         Transfer FHS out
*
fto       moveq   #$10,fhs_BO_stat              int0stat with BO only
	  moveq   #4,fhs_BO_bit                 the BO bit number
	  subq.l  #2,d3                         count-2!
	  bge.s   fto_i1                        initial BO test (n-1 bytes loop)
	  bra.s   fto_i2                        initial BO test (last byte loop)

*
* high-speed loop for n-1 bytes
*
fto_w1    move.b  (fhs_int0stat),d1             get card status
	  beq     fto_w1                        loop until we get something
	  cmp.b   d1,fhs_BO_stat                BO status only?
	  bne.s   fto_s1                        if not, process other conditions
fto_t1    move.b  (a0)+,(fhs_dataout)           transfer a byte
	  dbra    d3,fto_w1                     loop until lower count exhausted

	  clr     d3                            clear lower count word only
	  subq.l  #1,d3                         decrement the entire long count
	  bpl     fto_w1                        loop until entire long count exhausted

*
* last byte handling
*
fto_w2    move.b  (fhs_int0stat),d1             get card status
	  beq     fto_w2                        loop until we get something
	  cmp.b   d1,fhs_BO_stat                BO status only?
	  beq.s   fto_t2                        if so, transfer the byte
	  bsr     j_fakeisr                     otherwise, process the other conditions
fto_i2    bclr    fhs_BO_bit,h_int0copy(a2)     see if BO was logged
	  beq     fto_w2                        if not, keep waiting
fto_t2    tst.b   tend_off(a3)                  should we tag it with an EOI?
	  beq.s   fto_ob                        branch if not
	  move.b  #h_feoi,(fhs_auxcmd)          else tag it!
fto_ob    move.b  (a0)+,(fhs_dataout)           output the last byte

	  MOVE.L  TCNT_OFF(A3),D3               \
	  ADD.L   D3,TEMP_OFF(A3)               / update empty pointer
	  CLR.L   TCNT_OFF(A3)                  clear count
	  BRA.S   H_TFO_TRM                     ELSE WE ARE DONE!

*
* special status handling: n-1 bytes loop
*
fto_s1    bsr     j_fakeisr                     process the other conditions
fto_i1    bclr    fhs_BO_bit,h_int0copy(a2)     see if BO was logged
	  bne     fto_t1                        if so, go transfer the byte
	  bra     fto_w1                        otherwise, keep waiting

	  PAGE
*
* FHS TRANSFER TERMINATION
*
H_TFI_TRM MOVE.L  TCNT_OFF(A3),D4               get intended count
	  MOVE.L  D3,TCNT_OFF(A3)               D3 has bytes not finished
	  SUB.L   D3,D4                         D4 has bytes transfered
	  ADD.L   D4,TFIL_OFF(A3)               update fill pointer
	  BSET    #7,H_FLAGS(A2)                SET HOLDOFF INDICATOR
H_TFO_TRM andi.b  #$cf,h_int0copy(a2)
	  move.b  #h_dai0,(fhs_auxcmd)          re-enable card interrupts!
	  movem.l (sp)+,fhs_int0stat-fhs_datain restore the dedicated registers
	  JMP     STCLR                         MARK BUFFER FINISHED & RETURN



********************************************************************************
*
*       HD_STBSY
*
*         ROUTINE TO SET A DMA TFR BUFFER BUSY
*
*         ENTRY:
*                 D0.L = TRANSFER COUNT TO BE PUT IN TCNT_OFF(A2)
*                        AND TO BE ADDED TO E/F COUNT.
*                 A0.L = POINTER TO DMA TEMPS ( DMA1 OR DMA0 )
*                 A2.L = POINTER TO DRIVER TEMPS
*                 A3.L = POINTER TO BUFFER CTL BLOCK
*
*         HPL ROUTINE ( MODIFIED )
*
********************************************************************************
HD_STBSY  LEA     EXTH_EH_TDMA,A4       \
	  JMP     DMA_STBSY             /  SAVE H_DMATERM ROUTINE IN DMA TEMPS
	  PAGE
	  END

@


55.1
log
@Automatic bump of revision number for PWS version 3.25A
@
text
@@


54.1
log
@Automatic bump of revision number for PWS version 3.24
@
text
@@


53.1
log
@Automatic bump of revision number for PWS version 3.24B
@
text
@@


52.2
log
@Added a delay in H_R6OUT for the case of a 68040 to solve a timing
problem.
@
text
@@


52.1
log
@Automatic bump of revision number for PWS version 3.24A
@
text
@d1402 1
d1431 13
a1443 1
	  RTS
@


51.1
log
@Automatic bump of revision number for PWS version 3.24d
@
text
@@


50.1
log
@Automatic bump of revision number for PWS version 3.23c
@
text
@@


49.1
log
@Automatic bump of revision number for PWS version 3.24b
@
text
@@


48.1
log
@Automatic bump of revision number for PWS version 3.24a
@
text
@@


47.1
log
@Automatic bump of revision number for PWS version 3.23
@
text
@@


46.1
log
@Automatic bump of revision number for PWS version 3.23
@
text
@@


45.1
log
@Automatic bump of revision number for PWS version 3.23C
@
text
@@


44.1
log
@Automatic bump of revision number for PWS version 3.23B
@
text
@@


43.1
log
@Automatic bump of revision number for PWS version 3.23aA
@
text
@@


42.1
log
@Automatic bump of revision number for PWS version 3.23e
@
text
@@


41.1
log
@Automatic bump of revision number for PWS version 3.23d
@
text
@@


40.1
log
@Automatic bump of revision number for PWS version 3.23c
@
text
@@


39.1
log
@Automatic bump of revision number for PWS version 3.23b
@
text
@@


38.1
log
@Automatic bump of revision number for PWS version 3.23a
@
text
@@


37.1
log
@Automatic bump of revision number for PWS version 3.3a
@
text
@@


36.1
log
@Automatic bump of revision number for PWS version 3.22
@
text
@@


35.1
log
@Automatic bump of revision number for PWS version 3.22
@
text
@@


34.1
log
@Automatic bump of revision number for PWS version 3.22
@
text
@@


33.1
log
@Automatic bump of revision number for PWS version 3.22D
@
text
@@


32.1
log
@Automatic bump of revision number for PWS version 3.22C
@
text
@@


31.1
log
@Automatic bump of revision number for PWS version 3.22B
@
text
@@


30.1
log
@Automatic bump of revision number for PWS version 3.22A
@
text
@@


29.1
log
@Automatic bump of revision number for PWS version 3.22b
@
text
@@


28.1
log
@Automatic bump of revision number for PWS version 3.3b
@
text
@@


27.1
log
@Automatic bump of revision number for PWS version 3.3a
@
text
@@


26.1
log
@Automatic bump of revision number for PWS version 3.3 Synch
@
text
@@


25.1
log
@Automatic bump of revision number for PWS version 3.2Y
@
text
@@


24.1
log
@Automatic bump of revision number for PWS version 3.2
@
text
@@


23.1
log
@Automatic bump of revision number for PWS version 3.2P
@
text
@@


22.1
log
@Automatic bump of revision number for PWS version 3.2N
@
text
@@


21.1
log
@Automatic bump of revision number for PWS version 3.2M
@
text
@@


20.1
log
@Automatic bump of revision number for PWS version 3.2L
@
text
@@


19.1
log
@Automatic bump of revision number for PWS version 3.2K
@
text
@@


18.1
log
@Automatic bump of revision number for PWS version 3.2J
@
text
@@


17.1
log
@Automatic bump of revision number for PWS version 3.2I+
@
text
@@


16.1
log
@Automatic bump of revision number for PWS version 3.2I
@
text
@@


15.1
log
@Automatic bump of revision number for PWS version 3.2H
@
text
@@


14.1
log
@Automatic bump of revision number for PWS version 3.2G
@
text
@@


13.1
log
@Automatic bump of revision number for PWS version 3.2F
@
text
@@


12.1
log
@Automatic bump of revision number for PWS version 3.2E
@
text
@@


11.1
log
@Automatic bump of revision number for PWS version 3.2D
@
text
@@


10.1
log
@Automatic bump of revision number for PWS version 3.2C
@
text
@@


9.1
log
@Automatic bump of revision number for PWS version 3.2B
@
text
@@


8.1
log
@Automatic bump of revision number for PWS version 3.2A
@
text
@@


7.1
log
@Automatic bump of revision number for PWS version 3.2l
@
text
@@


6.1
log
@Automatic bump of revision number for PWS version 3.2k
@
text
@@


5.1
log
@Automatic bump of revision number for PWS version 3.2j
@
text
@@


4.1
log
@Automatic bump of revision number for PWS version 3.2i
@
text
@@


3.1
log
@Automatic bump of revision number for PWS version 3.2h
@
text
@@


2.1
log
@Auto bump rev number to 2.1 for sys 3.2e.
@
text
@@


1.1
log
@Initial revision
@
text
@@
