head     56.3;
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locks    ; strict;
comment  @# @;


56.3
date     93.01.27.13.58.13;  author jwh;  state Exp;
branches ;
next     56.2;

56.2
date     93.01.27.12.29.32;  author jwh;  state Exp;
branches ;
next     56.1;

56.1
date     91.11.07.12.31.20;  author jwh;  state Exp;
branches ;
next     1.1;

1.1
date     91.03.13.09.04.30;  author jwh;  state Exp;
branches ;
next     ;


desc
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56.3
log
@
pws2rcs automatic delta on Wed Jan 27 13:14:25 MST 1993
@
text
@*
*       x_fline.sa 3.1 12/10/90
*
*       fpsp_fline --- FPSP handler for fline exception
*
*       First determine if the exception is one of the unimplemented
*       floating point instructions.  If so, let fpsp_unimp handle it.
*       Next, determine if the instruction is an fmovecr with a non-zero
*       <ea> field.  If so, handle here and return.  Otherwise, it
*       must be a real F-line exception.
*

*               Copyright (C) Motorola, Inc. 1990
*                       All Rights Reserved
*
*       THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
*       The copyright notice above does not evidence any
*       actual or intended publication of such source code.



	include fpsp_h

	refr    real_fline
	refr    fpsp_unimp
	refr    uni_2
	refr    mem_read
	refr    fpsp_fmt_error

	def     fpsp_fline
fpsp_fline    equ   *
*
*       check for unimplemented vector first.  Use EXC_VEC-4 because
*       the equate is valid only after a 'link a6' has pushed one more
*       long onto the stack.
*
	cmpi.w  #UNIMP_VEC,EXC_VEC-4(a7)
	beq.l   fpsp_unimp
*
*       fmovecr with non-zero <ea> handling here
*
	sub.l   #4,a7           ;4 accounts for 2-word difference
*                               ;between six word frame (unimp) and
*                               ;four word frame
	link    a6,#-LOCAL_SIZE
	movem.l d0-d1/a0-a1,USER_DA(a6)
	movea.l EXC_PC+4(a6),a0 ;get address of fline instruction
	lea     L_SCR1(a6),a1   ;use L_SCR1 as scratch
	move.l  #4,d0
	bsr.l   mem_read
	move.l  L_SCR1(a6),d0   ;d0 contains the fline and command word
	bfextu  d0{4:3},d1      ;extract coprocessor id
	cmpi.b  #1,d1           ;check if cpid=1
	bne.w   not_mvcr        ;exit if not
	bfextu  d0{16:6},d1
	cmpi.b  #$17,d1         ;check if it is an FMOVECR encoding
	bne.w   not_mvcr
*                               ;if an FMOVECR instruction, fix stack
*                               ;and go to FPSP_UNIMP
fix_stack  equ  *
	cmpi.b  #VER_40,(a7)    ;test for orig unimp frame
	bne.b   ck_rev
	sub.l   #UNIMP_40_SIZE,a7 ;emulate an orig fsave
	move.b  #VER_40,(a7)
	clr.b   1(a7)
	clr.w   2(a7)
	bra.b   fix_con
ck_rev   equ   *
	cmpi.b  #VER_41,(a7)    ;test for rev unimp frame
	bne.l   fpsp_fmt_error  ;if not $40 or $41, exit with error
	sub.l   #UNIMP_41_SIZE,a7 ;emulate a rev fsave
	move.b  #VER_41,(a7)
	clr.b   1(a7)
	clr.w   2(a7)
fix_con   equ   *
	move.w  EXC_SR+4(a6),EXC_SR(a6) ;move stacked sr to new position
	move.l  EXC_PC+4(a6),EXC_PC(a6) ;move stacked pc to new position
	fmove.l EXC_PC(a6),FPIADDR ;point FPIADDR to fline inst
	move.l  #4,d1
	add.l   d1,EXC_PC(a6)   ;increment stacked pc value to next inst
	move.w  #$202c,EXC_VEC(a6) ;reformat vector to unimp
	clr.l   EXC_EA(a6)      ;clear the EXC_EA field
	move.w  d0,CMDREG1B(a6) ;move the lower word into CMDREG1B
	clr.l   E_BYTE(a6)
	bset    #UFLAG,T_BYTE(a6)
	movem.l USER_DA(a6),d0-d1/a0-a1 ;restore data registers
	bra.l   uni_2

not_mvcr  equ  *
	movem.l USER_DA(a6),d0-d1/a0-a1 ;restore data registers
	unlk    a6
	add.l   #4,a7
	bra.l   real_fline

	end
@


56.2
log
@
pws2rcs automatic delta on Wed Jan 27 11:57:27 MST 1993
@
text
@d1 95
@


56.1
log
@Automatic bump of revision number for PWS version 3.25
@
text
@a0 95
*
*       x_fline.sa 3.1 12/10/90
*
*       fpsp_fline --- FPSP handler for fline exception
*
*       First determine if the exception is one of the unimplemented
*       floating point instructions.  If so, let fpsp_unimp handle it.
*       Next, determine if the instruction is an fmovecr with a non-zero
*       <ea> field.  If so, handle here and return.  Otherwise, it
*       must be a real F-line exception.
*

*               Copyright (C) Motorola, Inc. 1990
*                       All Rights Reserved
*
*       THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
*       The copyright notice above does not evidence any
*       actual or intended publication of such source code.



	include fpsp_h

	refr    real_fline
	refr    fpsp_unimp
	refr    uni_2
	refr    mem_read
	refr    fpsp_fmt_error

	def     fpsp_fline
fpsp_fline    equ   *
*
*       check for unimplemented vector first.  Use EXC_VEC-4 because
*       the equate is valid only after a 'link a6' has pushed one more
*       long onto the stack.
*
	cmpi.w  #UNIMP_VEC,EXC_VEC-4(a7)
	beq.l   fpsp_unimp
*
*       fmovecr with non-zero <ea> handling here
*
	sub.l   #4,a7           ;4 accounts for 2-word difference
*                               ;between six word frame (unimp) and
*                               ;four word frame
	link    a6,#-LOCAL_SIZE
	movem.l d0-d1/a0-a1,USER_DA(a6)
	movea.l EXC_PC+4(a6),a0 ;get address of fline instruction
	lea     L_SCR1(a6),a1   ;use L_SCR1 as scratch
	move.l  #4,d0
	bsr.l   mem_read
	move.l  L_SCR1(a6),d0   ;d0 contains the fline and command word
	bfextu  d0{4:3},d1      ;extract coprocessor id
	cmpi.b  #1,d1           ;check if cpid=1
	bne.w   not_mvcr        ;exit if not
	bfextu  d0{16:6},d1
	cmpi.b  #$17,d1         ;check if it is an FMOVECR encoding
	bne.w   not_mvcr
*                               ;if an FMOVECR instruction, fix stack
*                               ;and go to FPSP_UNIMP
fix_stack  equ  *
	cmpi.b  #VER_40,(a7)    ;test for orig unimp frame
	bne.b   ck_rev
	sub.l   #UNIMP_40_SIZE,a7 ;emulate an orig fsave
	move.b  #VER_40,(a7)
	clr.b   1(a7)
	clr.w   2(a7)
	bra.b   fix_con
ck_rev   equ   *
	cmpi.b  #VER_41,(a7)    ;test for rev unimp frame
	bne.l   fpsp_fmt_error  ;if not $40 or $41, exit with error
	sub.l   #UNIMP_41_SIZE,a7 ;emulate a rev fsave
	move.b  #VER_41,(a7)
	clr.b   1(a7)
	clr.w   2(a7)
fix_con   equ   *
	move.w  EXC_SR+4(a6),EXC_SR(a6) ;move stacked sr to new position
	move.l  EXC_PC+4(a6),EXC_PC(a6) ;move stacked pc to new position
	fmove.l EXC_PC(a6),FPIADDR ;point FPIADDR to fline inst
	move.l  #4,d1
	add.l   d1,EXC_PC(a6)   ;increment stacked pc value to next inst
	move.w  #$202c,EXC_VEC(a6) ;reformat vector to unimp
	clr.l   EXC_EA(a6)      ;clear the EXC_EA field
	move.w  d0,CMDREG1B(a6) ;move the lower word into CMDREG1B
	clr.l   E_BYTE(a6)
	bset    #UFLAG,T_BYTE(a6)
	movem.l USER_DA(a6),d0-d1/a0-a1 ;restore data registers
	bra.l   uni_2

not_mvcr  equ  *
	movem.l USER_DA(a6),d0-d1/a0-a1 ;restore data registers
	unlk    a6
	add.l   #4,a7
	bra.l   real_fline

	end
@


1.1
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@Initial revision
@
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